Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD
This commit is contained in:
@@ -119,7 +119,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
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if (get_timer(start) > timeout) {
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printf("Timeout on data busy\n");
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printf("%s: Timeout on data busy\n", __func__);
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return TIMEOUT;
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}
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}
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@@ -177,14 +177,24 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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}
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}
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if (i == retry)
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if (i == retry) {
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printf("%s: Timeout.\n", __func__);
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return TIMEOUT;
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}
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if (mask & DWMCI_INTMSK_RTO) {
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debug("Response Timeout..\n");
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/*
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* Timeout here is not necessarily fatal. (e)MMC cards
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* will splat here when they receive CMD55 as they do
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* not support this command and that is exactly the way
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* to tell them apart from SD cards. Thus, this output
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* below shall be debug(). eMMC cards also do not favor
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* CMD8, please keep that in mind.
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*/
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debug("%s: Response Timeout.\n", __func__);
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return TIMEOUT;
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} else if (mask & DWMCI_INTMSK_RE) {
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debug("Response Error..\n");
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printf("%s: Response Error.\n", __func__);
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return -1;
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}
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@@ -204,7 +214,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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do {
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mask = dwmci_readl(host, DWMCI_RINTSTS);
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if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
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debug("DATA ERROR!\n");
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printf("%s: DATA ERROR!\n", __func__);
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return -1;
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}
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} while (!(mask & DWMCI_INTMSK_DTO));
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@@ -232,16 +242,16 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
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if ((freq == host->clock) || (freq == 0))
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return 0;
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/*
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* If host->get_mmc_clk didn't define,
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* If host->get_mmc_clk isn't defined,
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* then assume that host->bus_hz is source clock value.
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* host->bus_hz should be set from user.
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* host->bus_hz should be set by user.
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*/
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if (host->get_mmc_clk)
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sclk = host->get_mmc_clk(host);
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else if (host->bus_hz)
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sclk = host->bus_hz;
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else {
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printf("Didn't get source clock value..\n");
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printf("%s: Didn't get source clock value.\n", __func__);
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return -EINVAL;
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}
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@@ -260,7 +270,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
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do {
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status = dwmci_readl(host, DWMCI_CMD);
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if (timeout-- < 0) {
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printf("TIMEOUT error!!\n");
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printf("%s: Timeout!\n", __func__);
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return -ETIMEDOUT;
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}
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} while (status & DWMCI_CMD_START);
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@@ -275,7 +285,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
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do {
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status = dwmci_readl(host, DWMCI_CMD);
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if (timeout-- < 0) {
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printf("TIMEOUT error!!\n");
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printf("%s: Timeout!\n", __func__);
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return -ETIMEDOUT;
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}
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} while (status & DWMCI_CMD_START);
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@@ -290,7 +300,7 @@ static void dwmci_set_ios(struct mmc *mmc)
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struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
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u32 ctype, regs;
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debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock);
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debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock);
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dwmci_setup_bus(host, mmc->clock);
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switch (mmc->bus_width) {
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@@ -329,7 +339,7 @@ static int dwmci_init(struct mmc *mmc)
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dwmci_writel(host, DWMCI_PWREN, 1);
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if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
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debug("%s[%d] Fail-reset!!\n",__func__,__LINE__);
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printf("%s[%d] Fail-reset!!\n", __func__, __LINE__);
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return -1;
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}
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@@ -279,19 +279,21 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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u32 desc_num = priv->tx_currdescnum;
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struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
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uint32_t desc_start = (uint32_t)desc_p;
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uint32_t desc_end = desc_start +
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roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
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uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
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uint32_t data_end = data_start +
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roundup(length, ARCH_DMA_MINALIGN);
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/*
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* Strictly we only need to invalidate the "txrx_status" field
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* for the following check, but on some platforms we cannot
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* invalidate only 4 bytes, so roundup to
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* ARCH_DMA_MINALIGN. This is safe because the individual
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* descriptors in the array are each aligned to
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* ARCH_DMA_MINALIGN.
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* invalidate only 4 bytes, so we flush the entire descriptor,
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* which is 16 bytes in total. This is safe because the
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* individual descriptors in the array are each aligned to
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* ARCH_DMA_MINALIGN and padded appropriately.
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*/
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invalidate_dcache_range(
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(unsigned long)desc_p,
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(unsigned long)desc_p +
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roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN));
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invalidate_dcache_range(desc_start, desc_end);
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/* Check if the descriptor is owned by CPU */
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if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
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@@ -299,11 +301,10 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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return -1;
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}
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memcpy((void *)desc_p->dmamac_addr, packet, length);
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memcpy(desc_p->dmamac_addr, packet, length);
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/* Flush data to be sent */
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flush_dcache_range((unsigned long)desc_p->dmamac_addr,
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(unsigned long)desc_p->dmamac_addr + length);
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flush_dcache_range(data_start, data_end);
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#if defined(CONFIG_DW_ALTDESCRIPTOR)
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desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
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@@ -321,8 +322,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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#endif
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/* Flush modified buffer descriptor */
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flush_dcache_range((unsigned long)desc_p,
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(unsigned long)desc_p + sizeof(struct dmamacdescr));
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flush_dcache_range(desc_start, desc_end);
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/* Test the wrap-around condition. */
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if (++desc_num >= CONFIG_TX_DESCR_NUM)
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@@ -342,11 +342,14 @@ static int dw_eth_recv(struct eth_device *dev)
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u32 status, desc_num = priv->rx_currdescnum;
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struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
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int length = 0;
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uint32_t desc_start = (uint32_t)desc_p;
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uint32_t desc_end = desc_start +
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roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
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uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
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uint32_t data_end;
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/* Invalidate entire buffer descriptor */
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invalidate_dcache_range((unsigned long)desc_p,
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(unsigned long)desc_p +
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sizeof(struct dmamacdescr));
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invalidate_dcache_range(desc_start, desc_end);
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status = desc_p->txrx_status;
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@@ -357,9 +360,8 @@ static int dw_eth_recv(struct eth_device *dev)
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DESC_RXSTS_FRMLENSHFT;
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/* Invalidate received data */
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invalidate_dcache_range((unsigned long)desc_p->dmamac_addr,
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(unsigned long)desc_p->dmamac_addr +
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roundup(length, ARCH_DMA_MINALIGN));
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data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
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invalidate_dcache_range(data_start, data_end);
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NetReceive(desc_p->dmamac_addr, length);
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@@ -370,9 +372,7 @@ static int dw_eth_recv(struct eth_device *dev)
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desc_p->txrx_status |= DESC_RXSTS_OWNBYDMA;
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/* Flush only status field - others weren't changed */
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flush_dcache_range((unsigned long)&desc_p->txrx_status,
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(unsigned long)&desc_p->txrx_status +
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sizeof(desc_p->txrx_status));
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flush_dcache_range(desc_start, desc_end);
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/* Test the wrap-around condition. */
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if (++desc_num >= CONFIG_RX_DESCR_NUM)
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@@ -25,8 +25,7 @@ static struct phy_driver KSZ804_driver = {
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#ifndef CONFIG_PHY_MICREL_KSZ9021
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/*
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* I can't believe Micrel used the exact same part number
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* for the KSZ9021
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* Shame Micrel, Shame!!!!!
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* for the KSZ9021. Shame Micrel, Shame!
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*/
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static struct phy_driver KS8721_driver = {
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.name = "Micrel KS8721BL",
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@@ -40,7 +39,7 @@ static struct phy_driver KS8721_driver = {
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#endif
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/**
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/*
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* KSZ9021 - KSZ9031 common
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*/
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@@ -69,8 +68,8 @@ static int ksz90xx_startup(struct phy_device *phydev)
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phydev->speed = SPEED_10;
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return 0;
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}
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#ifdef CONFIG_PHY_MICREL_KSZ9021
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#ifdef CONFIG_PHY_MICREL_KSZ9021
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/*
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* KSZ9021
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*/
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