pmic: pmic_mc34vr500: Add a driver for the mc34vr500 pmic
This patch adds a simple pmic driver for the mc34vr500 pmic which is used in conjunction with the fsl T1 and LS1 series SoC. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
9cfab06e79
commit
762161b04a
@ -164,3 +164,10 @@ config PMIC_LP873X
|
||||
---help---
|
||||
The LP873X is a PMIC containing couple of LDOs and couple of SMPS.
|
||||
This driver binds the pmic children.
|
||||
|
||||
config POWER_MC34VR500
|
||||
bool "Enable driver for Freescale MC34VR500 PMIC"
|
||||
---help---
|
||||
The MC34VR500 is used in conjunction with the FSL T1 and LS1 series
|
||||
SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed
|
||||
via an I2C interface.
|
||||
|
@ -33,3 +33,4 @@ obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
|
||||
obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
|
||||
obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
|
||||
obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
|
||||
obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o
|
||||
|
32
drivers/power/pmic/pmic_mc34vr500.c
Normal file
32
drivers/power/pmic/pmic_mc34vr500.c
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright 2016 Freescale Semiconductor, Inc.
|
||||
* Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <errno.h>
|
||||
#include <i2c.h>
|
||||
#include <power/pmic.h>
|
||||
#include <power/mc34vr500_pmic.h>
|
||||
|
||||
int power_mc34vr500_init(unsigned char bus)
|
||||
{
|
||||
static const char name[] = "MC34VR500";
|
||||
struct pmic *p = pmic_alloc();
|
||||
|
||||
if (!p) {
|
||||
printf("%s: POWER allocation error!\n", __func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
p->name = name;
|
||||
p->interface = PMIC_I2C;
|
||||
p->number_of_regs = MC34VR500_NUM_OF_REGS;
|
||||
p->hw.i2c.addr = MC34VR500_I2C_ADDR;
|
||||
p->hw.i2c.tx_num = 1;
|
||||
p->bus = bus;
|
||||
|
||||
return 0;
|
||||
}
|
166
include/power/mc34vr500_pmic.h
Normal file
166
include/power/mc34vr500_pmic.h
Normal file
@ -0,0 +1,166 @@
|
||||
/*
|
||||
* Copyright 2016 Freescale Semiconductor, Inc.
|
||||
* Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __MC34VR500_H_
|
||||
#define __MC34VR500_H_
|
||||
|
||||
#include <power/pmic.h>
|
||||
|
||||
#define MC34VR500_I2C_ADDR 0x08
|
||||
|
||||
/* Drivers name */
|
||||
#define MC34VR500_REGULATOR_DRIVER "mc34vr500_regulator"
|
||||
|
||||
/* Register map */
|
||||
enum {
|
||||
MC34VR500_DEVICEID = 0x00,
|
||||
|
||||
MC34VR500_SILICONREVID = 0x03,
|
||||
MC34VR500_FABID,
|
||||
MC34VR500_INTSTAT0,
|
||||
MC34VR500_INTMASK0,
|
||||
MC34VR500_INTSENSE0,
|
||||
MC34VR500_INTSTAT1,
|
||||
MC34VR500_INTMASK1,
|
||||
MC34VR500_INTSENSE1,
|
||||
|
||||
MC34VR500_INTSTAT4 = 0x11,
|
||||
MC34VR500_INTMASK4,
|
||||
MC34VR500_INTSENSE4,
|
||||
|
||||
MC34VR500_PWRCTL = 0x1B,
|
||||
|
||||
MC34VR500_SW1VOLT = 0x2E,
|
||||
MC34VR500_SW1STBY,
|
||||
MC34VR500_SW1OFF,
|
||||
MC34VR500_SW1MODE,
|
||||
MC34VR500_SW1CONF,
|
||||
MC34VR500_SW2VOLT,
|
||||
MC34VR500_SW2STBY,
|
||||
MC34VR500_SW2OFF,
|
||||
MC34VR500_SW2MODE,
|
||||
MC34VR500_SW2CONF,
|
||||
|
||||
MC34VR500_SW3VOLT = 0x3C,
|
||||
MC34VR500_SW3STBY,
|
||||
MC34VR500_SW3OFF,
|
||||
MC34VR500_SW3MODE,
|
||||
MC34VR500_SW3CONF,
|
||||
|
||||
MC34VR500_SW4VOLT = 0x4A,
|
||||
MC34VR500_SW4STBY,
|
||||
MC34VR500_SW4OFF,
|
||||
MC34VR500_SW4MODE,
|
||||
MC34VR500_SW4CONF,
|
||||
|
||||
MC34VR500_REFOUTCRTRL = 0x6A,
|
||||
|
||||
MC34VR500_LDO1CTL = 0x6D,
|
||||
MC34VR500_LDO2CTL,
|
||||
MC34VR500_LDO3CTL,
|
||||
MC34VR500_LDO4CTL,
|
||||
MC34VR500_LDO5CTL,
|
||||
|
||||
MC34VR500_PAGE_REGISTER = 0x7F,
|
||||
|
||||
/* Internal RAM */
|
||||
MC34VR500_SW1_VOLT = 0xA8,
|
||||
MC34VR500_SW1_SEQ,
|
||||
MC34VR500_SW1_CONFIG,
|
||||
|
||||
MC34VR500_SW2_VOLT = 0xAC,
|
||||
MC34VR500_SW2_SEQ,
|
||||
MC34VR500_SW2_CONFIG,
|
||||
|
||||
MC34VR500_SW3_VOLT = 0xB0,
|
||||
MC34VR500_SW3_SEQ,
|
||||
MC34VR500_SW3_CONFIG,
|
||||
|
||||
MC34VR500_SW4_VOLT = 0xB8,
|
||||
MC34VR500_SW4_SEQ,
|
||||
MC34VR500_SW4_CONFIG,
|
||||
|
||||
MC34VR500_REFOUT_SEQ = 0xC4,
|
||||
|
||||
MC34VR500_LDO1_VOLT = 0xCC,
|
||||
MC34VR500_LDO1_SEQ,
|
||||
|
||||
MC34VR500_LDO2_VOLT = 0xD0,
|
||||
MC34VR500_LDO2_SEQ,
|
||||
|
||||
MC34VR500_LDO3_VOLT = 0xD4,
|
||||
MC34VR500_LDO3_SEQ,
|
||||
|
||||
MC34VR500_LDO4_VOLT = 0xD8,
|
||||
MC34VR500_LDO4_SEQ,
|
||||
|
||||
MC34VR500_LDO5_VOLT = 0xDC,
|
||||
MC34VR500_LDO5_SEQ,
|
||||
|
||||
MC34VR500_PU_CONFIG1 = 0xE0,
|
||||
|
||||
MC34VR500_TBB_POR = 0xE4,
|
||||
|
||||
MC34VR500_PWRGD_EN = 0xE8,
|
||||
|
||||
MC34VR500_NUM_OF_REGS,
|
||||
};
|
||||
|
||||
/* Registor offset based on SWxVOLT register */
|
||||
#define MC34VR500_VOLT_OFFSET 0
|
||||
#define MC34VR500_STBY_OFFSET 1
|
||||
#define MC34VR500_OFF_OFFSET 2
|
||||
#define MC34VR500_MODE_OFFSET 3
|
||||
#define MC34VR500_CONF_OFFSET 4
|
||||
|
||||
#define SW_MODE_MASK 0xf
|
||||
#define SW_MODE_SHIFT 0
|
||||
|
||||
#define LDO_VOL_MASK 0xf
|
||||
#define LDO_EN (1 << 4)
|
||||
#define LDO_MODE_SHIFT 4
|
||||
#define LDO_MODE_MASK (1 << 4)
|
||||
#define LDO_MODE_OFF 0
|
||||
#define LDO_MODE_ON 1
|
||||
|
||||
#define REFOUTEN (1 << 4)
|
||||
|
||||
/*
|
||||
* Regulator Mode Control
|
||||
*
|
||||
* OFF: The regulator is switched off and the output voltage is discharged.
|
||||
* PFM: In this mode, the regulator is always in PFM mode, which is useful
|
||||
* at light loads for optimized efficiency.
|
||||
* PWM: In this mode, the regulator is always in PWM mode operation
|
||||
* regardless of load conditions.
|
||||
* APS: In this mode, the regulator moves automatically between pulse
|
||||
* skipping mode and PWM mode depending on load conditions.
|
||||
*
|
||||
* SWxMODE[3:0]
|
||||
* Normal Mode | Standby Mode | value
|
||||
* OFF OFF 0x0
|
||||
* PWM OFF 0x1
|
||||
* PFM OFF 0x3
|
||||
* APS OFF 0x4
|
||||
* PWM PWM 0x5
|
||||
* PWM APS 0x6
|
||||
* APS APS 0x8
|
||||
* APS PFM 0xc
|
||||
* PWM PFM 0xd
|
||||
*/
|
||||
#define OFF_OFF 0x0
|
||||
#define PWM_OFF 0x1
|
||||
#define PFM_OFF 0x3
|
||||
#define APS_OFF 0x4
|
||||
#define PWM_PWM 0x5
|
||||
#define PWM_APS 0x6
|
||||
#define APS_APS 0x8
|
||||
#define APS_PFM 0xc
|
||||
#define PWM_PFM 0xd
|
||||
|
||||
int power_mc34vr500_init(unsigned char bus);
|
||||
#endif /* __MC34VR500_PMIC_H_ */
|
Loading…
Reference in New Issue
Block a user