Merge git://git.denx.de/u-boot-dm

This commit is contained in:
Tom Rini
2015-02-13 13:11:09 -05:00
152 changed files with 2813 additions and 394 deletions

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@@ -20,8 +20,10 @@
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#ifndef CONFIG_DM_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#endif
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

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@@ -11,6 +11,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#include <linux/kconfig.h>
#define CONFIG_SYS_GENERIC_BOARD
/*-----------------------------------------------------------------------
* High Level Configuration Options
*----------------------------------------------------------------------*/
@@ -19,10 +23,10 @@
* and Arches dual (460GT)
*/
#ifdef CONFIG_CANYONLANDS
#define CONFIG_460EX 1 /* Specific PPC460EX */
#define CONFIG_460EX /* Specific PPC460EX */
#define CONFIG_HOSTNAME canyonlands
#else
#define CONFIG_460GT 1 /* Specific PPC460GT */
#define CONFIG_460GT /* Specific PPC460GT */
#ifdef CONFIG_GLACIER
#define CONFIG_HOSTNAME glacier
#else
@@ -32,7 +36,7 @@
#endif
#endif
#define CONFIG_440 1
#define CONFIG_440
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
@@ -45,10 +49,10 @@
#define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_TYPES 1 /* support board types */
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R /* Call misc_init_r */
#define CONFIG_BOARD_TYPES /* support board types */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@@ -134,7 +138,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
#define CONFIG_SYS_FLASH_CFI_AMD_RESET /* Use AMD (Spansion) reset cmd */
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
@@ -172,9 +176,9 @@
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x50, 0x51} /* SPD i2c spd addresses*/
#define CONFIG_DDR_ECC 1 /* with ECC support */
#define CONFIG_DDR_ECC /* with ECC support */
#define CONFIG_DDR_RQDC_FIXED 0x80000038 /* fixed value for RQDC */
#else /* defined(CONFIG_ARCHES) */
@@ -262,8 +266,8 @@
#define CONFIG_4xx_CONFIG_BLOCKSIZE 16
/* I2C SYSMON (LM75, AD7414 is almost compatible) */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
#define CONFIG_DTT_AD7414 1 /* use AD7414 */
#define CONFIG_DTT_LM75 /* ON Semi's LM75 */
#define CONFIG_DTT_AD7414 /* use AD7414 */
#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
#define CONFIG_SYS_DTT_MAX_TEMP 70
#define CONFIG_SYS_DTT_LOW_TEMP -30
@@ -275,14 +279,14 @@
#if !defined(CONFIG_ARCHES)
/* RTC configuration */
#define CONFIG_RTC_M41T62 1
#define CONFIG_RTC_M41T62
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#endif
/*-----------------------------------------------------------------------
* Ethernet
*----------------------------------------------------------------------*/
#define CONFIG_IBM_EMAC4_V4 1
#define CONFIG_IBM_EMAC4_V4
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
@@ -322,9 +326,9 @@
#define CONFIG_GPCS_PHY2_ADDR 0xC
#endif /* !defined(CONFIG_ARCHES) */
#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_PHY_DYNAMIC_ANEG 1
#define CONFIG_PHY_RESET /* reset phy upon startup */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#define CONFIG_PHY_DYNAMIC_ANEG
/*-----------------------------------------------------------------------
* USB-OHCI

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@@ -21,14 +21,7 @@
#define CONFIG_MACH_TYPE 4273
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_CMD_GPIO
#define CONFIG_DM_SERIAL
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/* Display information on boot */

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@@ -17,12 +17,6 @@
#include <linux/sizes.h>
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
#define CONFIG_DM_SPI
#define CONFIG_DM_SPI_FLASH
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
@@ -42,7 +36,6 @@
#define CONFIG_ENV_OVERWRITE
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/* select serial console configuration */

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@@ -39,7 +39,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F

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@@ -25,9 +25,6 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_DM
#define CONFIG_DM_THERMAL
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_IMX6_THERMAL
#define CONFIG_SYS_GENERIC_BOARD

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@@ -229,7 +229,6 @@
#define CONFIG_DM
#define CONFIG_DM_THERMAL
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_IMX6_THERMAL
#define CONFIG_CMD_FUSE

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@@ -116,7 +116,6 @@
#define CONFIG_SYS_MEMTEST_END 0x20000000
#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* SPL */
#define CONFIG_SPL_FAT_SUPPORT

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@@ -44,7 +44,6 @@
#define CONFIG_POWER_TPS65090_EC
#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
#define CONFIG_DM_CROS_EC
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS

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@@ -44,7 +44,6 @@
#define CONFIG_POWER_TPS65090_EC
#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
#define CONFIG_DM_CROS_EC
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS

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@@ -30,12 +30,6 @@
*/
#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
/* Enable driver model */
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
/* Memory layout */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x00000000
@@ -52,7 +46,6 @@
CONFIG_SYS_SDRAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MALLOC_LEN SZ_4M
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MEMTEST_START 0x00100000
#define CONFIG_SYS_MEMTEST_END 0x00200000
#define CONFIG_LOADADDR 0x00200000

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@@ -40,7 +40,6 @@
#define CONFIG_CMDLINE_EDITING
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/*
@@ -290,9 +289,5 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
#endif /* __CONFIG_H */

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@@ -23,15 +23,6 @@
#define CONFIG_BOOTSTAGE
#define CONFIG_BOOTSTAGE_REPORT
#define CONFIG_CMD_DEMO
#define CONFIG_CMD_DM
#define CONFIG_DM_DEMO
#define CONFIG_DM_DEMO_SIMPLE
#define CONFIG_DM_DEMO_SHAPE
#define CONFIG_DM_GPIO
#define CONFIG_DM_TEST
#define CONFIG_DM_SERIAL
#define CONFIG_DM_CROS_EC
#define CONFIG_SYS_STDIO_DEREGISTER
@@ -69,7 +60,6 @@
/*
* Size of malloc() pool, before and after relocation
*/
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_MALLOC_F_ADDR 0x0010000
#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
@@ -96,8 +86,6 @@
#define CONFIG_CMD_SF_TEST
#define CONFIG_CMD_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_DM_SPI
#define CONFIG_DM_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SPI_FLASH_EON
#define CONFIG_SPI_FLASH_GIGADEVICE
@@ -108,7 +96,6 @@
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_DM_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SANDBOX
#define CONFIG_I2C_EDID

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@@ -48,9 +48,6 @@
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
/* Small malloc pool before relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/*
* select serial console configuration
*/
@@ -224,9 +221,5 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
#endif /* __CONFIG_H */

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@@ -21,11 +21,6 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/* CPU */
#define CONFIG_ARCH_CPU_INIT

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@@ -190,10 +190,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
* QSPI support
*/
#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
#define CONFIG_CMD_DM
#define CONFIG_DM
#define CONFIG_DM_SPI
#define CONFIG_DM_SPI_FLASH
#define CONFIG_CADENCE_QSPI
/* Enable multiple SPI NOR flash manufacturers */
#define CONFIG_SPI_FLASH /* SPI flash subsystem */
@@ -210,9 +206,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#endif
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
#define CONFIG_CMD_DM
#define CONFIG_DM
#define CONFIG_DM_SPI
#define CONFIG_DESIGNWARE_SPI
#define CONFIG_CMD_SPI
#endif

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@@ -28,21 +28,10 @@
(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_DM
/* serial port (PL011) configuration */
#define CONFIG_BAUDRATE 115200
#ifdef CONFIG_DM
#define CONFIG_DM_SERIAL
#define CONFIG_PL01X_SERIAL
#else
#define CONFIG_SYS_SERIAL0 0x80406000
#define CONFIG_CONS_INDEX 0
#define CONFIG_PL011_SERIAL
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0}
#define CONFIG_PL011_CLOCK (2700 * 1000)
#endif
/* user interface */
#define CONFIG_SYS_PROMPT "STV0991> "

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@@ -28,11 +28,7 @@
#define CONFIG_SYS_TEXT_BASE 0x4a000000
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
# define CONFIG_CMD_DM
# define CONFIG_DM_GPIO
# define CONFIG_DM_SERIAL
# define CONFIG_DW_SERIAL
# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/*

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@@ -18,16 +18,6 @@
#include <asm/arch/tegra.h> /* get chip and board defs */
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_SERIAL
#endif
#define CONFIG_DM_SPI
#define CONFIG_DM_SPI_FLASH
#define CONFIG_DM_I2C
#define CONFIG_SYS_TIMER_RATE 1000000
#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
@@ -47,7 +37,6 @@
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */

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@@ -20,14 +20,7 @@
#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_DM
# define CONFIG_DM
#endif
# define CONFIG_CMD_DM
# define CONFIG_DM_GPIO
# define CONFIG_DM_SERIAL
# define CONFIG_OMAP_SERIAL
# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
#include <asm/arch/omap.h>

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@@ -19,12 +19,7 @@
#include <asm/arch/omap3.h>
#ifndef CONFIG_SPL_BUILD
# define CONFIG_DM
# define CONFIG_CMD_DM
# define CONFIG_DM_GPIO
# define CONFIG_DM_SERIAL
# define CONFIG_OMAP_SERIAL
# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#endif
/* The chip has SDRC controller */

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@@ -80,8 +80,6 @@
#define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
/*-----------------------------------------------------------------------
* MMU and Cache Setting
*----------------------------------------------------------------------*/
@@ -192,8 +190,6 @@
#define CONFIG_FAT_WRITE
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_DM
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)

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@@ -22,11 +22,6 @@
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DM
#define CONFIG_CMD_DM
#define CONFIG_DM_GPIO
#define CONFIG_DM_SERIAL
#define CONFIG_LMB
#define CONFIG_OF_LIBFDT
@@ -192,7 +187,6 @@
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MALLOC_LEN 0x200000
#define CONFIG_SYS_MALLOC_F_LEN (2 << 10)
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE