dm: sata: dw_sata: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the uclass-private data in a different way. Move the code into new 'common' functions and set up stubs to call these. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
Jaehoon Chung
parent
036a803e1b
commit
752126a05a
@ -10,6 +10,7 @@
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#include <fis.h>
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#include <libata.h>
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#include <malloc.h>
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#include <memalign.h>
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#include <sata.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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@ -720,6 +721,130 @@ static u32 ata_low_level_rw_lba28(struct ahci_uc_priv *uc_priv, u32 blknr,
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return blkcnt;
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}
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static int dwc_ahci_start_ports(struct ahci_uc_priv *uc_priv)
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{
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u32 linkmap;
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int i;
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linkmap = uc_priv->link_port_map;
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if (0 == linkmap) {
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printf("No port device detected!\n");
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return -ENXIO;
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}
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for (i = 0; i < uc_priv->n_ports; i++) {
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if ((linkmap >> i) && ((linkmap >> i) & 0x01)) {
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if (ahci_port_start(uc_priv, (u8)i)) {
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printf("Can not start port %d\n", i);
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return 1;
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}
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uc_priv->hard_port_no = i;
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break;
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}
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}
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return 0;
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}
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static int dwc_ahsata_scan_common(struct ahci_uc_priv *uc_priv,
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struct blk_desc *pdev)
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{
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u8 serial[ATA_ID_SERNO_LEN + 1] = { 0 };
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u8 firmware[ATA_ID_FW_REV_LEN + 1] = { 0 };
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u8 product[ATA_ID_PROD_LEN + 1] = { 0 };
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u64 n_sectors;
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u8 port = uc_priv->hard_port_no;
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ALLOC_CACHE_ALIGN_BUFFER(u16, id, ATA_ID_WORDS);
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/* Identify device to get information */
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dwc_ahsata_identify(uc_priv, id);
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/* Serial number */
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ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
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memcpy(pdev->product, serial, sizeof(serial));
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/* Firmware version */
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ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
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memcpy(pdev->revision, firmware, sizeof(firmware));
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/* Product model */
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ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
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memcpy(pdev->vendor, product, sizeof(product));
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/* Totoal sectors */
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n_sectors = ata_id_n_sectors(id);
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pdev->lba = (u32)n_sectors;
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pdev->type = DEV_TYPE_HARDDISK;
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pdev->blksz = ATA_SECT_SIZE;
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pdev->lun = 0;
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/* Check if support LBA48 */
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if (ata_id_has_lba48(id)) {
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pdev->lba48 = 1;
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debug("Device support LBA48\n\r");
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}
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/* Get the NCQ queue depth from device */
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uc_priv->flags &= (~SATA_FLAG_Q_DEP_MASK);
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uc_priv->flags |= ata_id_queue_depth(id);
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/* Get the xfer mode from device */
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dwc_ahsata_xfer_mode(uc_priv, id);
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/* Get the write cache status from device */
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dwc_ahsata_init_wcache(uc_priv, id);
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/* Set the xfer mode to highest speed */
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ahci_set_feature(uc_priv, port);
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dwc_ahsata_print_info(pdev);
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return 0;
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}
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/*
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* SATA interface between low level driver and command layer
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*/
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static ulong sata_read_common(struct ahci_uc_priv *uc_priv,
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struct blk_desc *desc, ulong blknr,
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lbaint_t blkcnt, void *buffer)
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{
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u32 rc;
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if (desc->lba48)
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
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READ_CMD);
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else
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
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READ_CMD);
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return rc;
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}
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static ulong sata_write_common(struct ahci_uc_priv *uc_priv,
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struct blk_desc *desc, ulong blknr,
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lbaint_t blkcnt, const void *buffer)
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{
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u32 rc;
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u32 flags = uc_priv->flags;
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if (desc->lba48) {
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) && (flags & SATA_FLAG_FLUSH_EXT))
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dwc_ahsata_flush_cache_ext(uc_priv);
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} else {
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) && (flags & SATA_FLAG_FLUSH))
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dwc_ahsata_flush_cache(uc_priv);
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}
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return rc;
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}
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static int ahci_init_one(int pdev)
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{
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int rc;
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@ -755,8 +880,6 @@ err_out:
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int init_sata(int dev)
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{
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int i;
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u32 linkmap;
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struct ahci_uc_priv *uc_priv = NULL;
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#if defined(CONFIG_MX6)
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@ -771,25 +894,8 @@ int init_sata(int dev)
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ahci_init_one(dev);
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uc_priv = sata_dev_desc[dev].priv;
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linkmap = uc_priv->link_port_map;
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if (0 == linkmap) {
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printf("No port device detected!\n");
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return 1;
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}
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for (i = 0; i < uc_priv->n_ports; i++) {
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if ((linkmap >> i) && ((linkmap >> i) & 0x01)) {
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if (ahci_port_start(uc_priv, (u8)i)) {
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printf("Can not start port %d\n", i);
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return 1;
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}
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uc_priv->hard_port_no = i;
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break;
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}
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}
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return 0;
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return dwc_ahci_start_ports(uc_priv) ? 1 : 0;
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}
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int reset_sata(int dev)
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@ -838,103 +944,23 @@ int sata_port_status(int dev, int port)
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ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
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{
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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u32 rc;
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if (sata_dev_desc[dev].lba48)
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt,
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buffer, READ_CMD);
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else
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt,
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buffer, READ_CMD);
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return rc;
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return sata_read_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
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buffer);
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}
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ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
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{
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u32 rc;
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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u32 flags = uc_priv->flags;
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if (sata_dev_desc[dev].lba48) {
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rc = ata_low_level_rw_lba48(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) &&
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(flags & SATA_FLAG_FLUSH_EXT))
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dwc_ahsata_flush_cache_ext(uc_priv);
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} else {
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rc = ata_low_level_rw_lba28(uc_priv, blknr, blkcnt, buffer,
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WRITE_CMD);
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if ((flags & SATA_FLAG_WCACHE) &&
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(flags & SATA_FLAG_FLUSH))
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dwc_ahsata_flush_cache(uc_priv);
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}
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return rc;
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return sata_write_common(uc_priv, &sata_dev_desc[dev], blknr, blkcnt,
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buffer);
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}
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int scan_sata(int dev)
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{
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u8 serial[ATA_ID_SERNO_LEN + 1] = { 0 };
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u8 firmware[ATA_ID_FW_REV_LEN + 1] = { 0 };
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u8 product[ATA_ID_PROD_LEN + 1] = { 0 };
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u16 *id;
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u64 n_sectors;
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struct ahci_uc_priv *uc_priv = sata_dev_desc[dev].priv;
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u8 port = uc_priv->hard_port_no;
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struct blk_desc *pdev = &sata_dev_desc[dev];
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id = (u16 *)memalign(ARCH_DMA_MINALIGN,
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roundup(ARCH_DMA_MINALIGN,
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(ATA_ID_WORDS * 2)));
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if (!id) {
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printf("id malloc failed\n\r");
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return -1;
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}
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/* Identify device to get information */
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dwc_ahsata_identify(uc_priv, id);
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/* Serial number */
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ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
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memcpy(pdev->product, serial, sizeof(serial));
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/* Firmware version */
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ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
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memcpy(pdev->revision, firmware, sizeof(firmware));
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/* Product model */
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ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
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memcpy(pdev->vendor, product, sizeof(product));
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/* Totoal sectors */
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n_sectors = ata_id_n_sectors(id);
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pdev->lba = (u32)n_sectors;
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pdev->type = DEV_TYPE_HARDDISK;
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pdev->blksz = ATA_SECT_SIZE;
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pdev->lun = 0 ;
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/* Check if support LBA48 */
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if (ata_id_has_lba48(id)) {
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pdev->lba48 = 1;
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debug("Device support LBA48\n\r");
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}
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/* Get the NCQ queue depth from device */
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uc_priv->flags &= (~SATA_FLAG_Q_DEP_MASK);
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uc_priv->flags |= ata_id_queue_depth(id);
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/* Get the xfer mode from device */
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dwc_ahsata_xfer_mode(uc_priv, id);
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/* Get the write cache status from device */
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dwc_ahsata_init_wcache(uc_priv, id);
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/* Set the xfer mode to highest speed */
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ahci_set_feature(uc_priv, port);
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free((void *)id);
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dwc_ahsata_print_info(&sata_dev_desc[dev]);
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return 0;
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return dwc_ahsata_scan_common(uc_priv, pdev);
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}
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