Merge git://git.denx.de/u-boot-video

This commit is contained in:
Tom Rini
2017-10-09 13:31:33 -04:00
44 changed files with 495 additions and 579 deletions

View File

@@ -13,12 +13,6 @@
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <debug_uart.h>
#include <lcd.h>
#include <atmel_hlcdc.h>
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
#endif
#include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -86,103 +80,15 @@ static void at91sam9x5ek_nand_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 24000000,
.vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_clk_pol = 1,
.vl_hsync_len = 128,
.vl_left_margin = 64,
.vl_right_margin = 64,
.vl_vsync_len = 2,
.vl_upper_margin = 22,
.vl_lower_margin = 21,
.mmio = ATMEL_BASE_LCDC,
};
void lcd_enable(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
if (has_lcdc())
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 1); /* power up */
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}
void lcd_disable(void)
{
if (has_lcdc())
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* power down */
}
static void at91sam9x5ek_lcd_hw_init(void)
{
if (has_lcdc()) {
at91_pio3_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDPCK */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
if (has_lcdc()) {
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("(C) 2012 ATMEL Corp\n");
lcd_printf("at91support@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n",
get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20);
}
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
@@ -215,9 +121,6 @@ int board_init(void)
#if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD)
at91_uhp_hw_init();
#endif
#ifdef CONFIG_LCD
at91sam9x5ek_lcd_hw_init();
#endif
return 0;
}

View File

@@ -43,7 +43,7 @@ int at91_video_show_board_info(void)
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i]->size;
nand_size += get_nand_dev_by_index(i)->size;
#endif
len += sprintf(&buf[len], "%ld MB SDRAM, %ld MB NAND\n",

View File

@@ -6,10 +6,7 @@
*/
#include <common.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <version.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/atmel_pio4.h>
@@ -26,90 +23,15 @@ static void board_usb_hw_init(void)
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);
}
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 480,
.vl_row = 272,
.vl_clk = 9000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 41,
.vl_left_margin = 2,
.vl_right_margin = 2,
.vl_vsync_len = 11,
.vl_upper_margin = 2,
.vl_lower_margin = 2,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}
static void board_lcd_hw_init(void)
{
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDPWM */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDISP */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDVSYNC */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 31, 0); /* LCDHSYNC */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 0, 0); /* LCDPCK */
atmel_pio4_set_a_periph(AT91_PIO_PORTD, 1, 0); /* LCDDEN */
/* LCDDAT0 */
/* LCDDAT1 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDDAT2 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDDAT3 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDDAT4 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDDAT5 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDDAT6 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDDAT7 */
/* LCDDAT8 */
/* LCDDAT9 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDDAT10 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDDAT11 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDDAT12 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDDAT13 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDDAT14 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDDAT15 */
/* LCDD16 */
/* LCDD17 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDDAT18 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDDAT19 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDAT20 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 25, 0); /* LCDDAT21 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDDAT22 */
atmel_pio4_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDDAT23 */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2015 ATMEL Corp\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
lcd_printf("%ld MB SDRAM\n", dram_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void board_uart1_hw_init(void)
@@ -142,9 +64,6 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_LCD
board_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
#endif

View File

@@ -13,9 +13,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <debug_uart.h>
#include <lcd.h>
#include <linux/ctype.h>
#include <atmel_hlcdc.h>
#include <phy.h>
#include <micrel.h>
#include <spl.h>
@@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 24000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 128,
.vl_left_margin = 64,
.vl_right_margin = 64,
.vl_vsync_len = 2,
.vl_upper_margin = 22,
.vl_lower_margin = 21,
.mmio = ATMEL_BASE_LCDC,
};
void lcd_enable(void)
{
}
void lcd_disable(void)
{
}
static void sama5d3xek_lcd_hw_init(void)
{
gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
/* The higher 8 bit of LCD is board related */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */
/* Configure lower 16 bit of LCD and enable clock */
at91_lcd_hw_init();
}
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
void lcd_show_board_info(void)
{
ulong dram_size;
uint64_t nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("(C) 2013 ATMEL Corp\n");
lcd_printf("at91@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#endif
lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
dram_size >> 20, nand_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
@@ -239,10 +163,6 @@ int board_init(void)
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3xek_mci_hw_init();
#endif
#ifdef CONFIG_LCD
if (has_lcdc())
sama5d3xek_lcd_hw_init();
#endif
return 0;
}
@@ -268,6 +188,9 @@ int board_late_init(void)
strcat(name, "ek.dtb");
env_set("dtb_name", name);
#endif
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}

View File

@@ -14,11 +14,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/sama5d4.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <nand.h>
#include <version.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -73,98 +69,15 @@ static void sama5d4_xplained_usb_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 480,
.vl_row = 272,
.vl_clk = 9000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 41,
.vl_left_margin = 2,
.vl_right_margin = 2,
.vl_vsync_len = 11,
.vl_upper_margin = 2,
.vl_lower_margin = 2,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
}
static void sama5d4_xplained_lcd_hw_init(void)
{
at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 0, 0); /* LCDD0 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 1, 0); /* LCDD1 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 8, 0); /* LCDD9 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 0); /* LCDD8 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 0); /* LCDD16 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 0); /* LCDD17 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */
/* Enable clock */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2014 ATMEL Corp\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);
return 0;
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void sama5d4_xplained_serial3_hw_init(void)
@@ -212,9 +125,6 @@ int board_init(void)
#ifdef CONFIG_NAND_ATMEL
sama5d4_xplained_nand_hw_init();
#endif
#ifdef CONFIG_LCD
sama5d4_xplained_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
sama5d4_xplained_usb_hw_init();
#endif

View File

@@ -14,11 +14,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/sama5d3_smc.h>
#include <asm/arch/sama5d4.h>
#include <atmel_hlcdc.h>
#include <debug_uart.h>
#include <lcd.h>
#include <nand.h>
#include <version.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -74,93 +70,15 @@ static void sama5d4ek_usb_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 33260000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 5,
.vl_left_margin = 128,
.vl_right_margin = 0,
.vl_vsync_len = 5,
.vl_upper_margin = 23,
.vl_lower_margin = 22,
.mmio = ATMEL_BASE_LCDC,
};
/* No power up/down pin for the LCD pannel */
void lcd_enable(void) { /* Empty! */ }
void lcd_disable(void) { /* Empty! */ }
unsigned int has_lcdc(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
return 1;
}
static void sama5d4ek_lcd_hw_init(void)
{
at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */
at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */
/* Enable clock */
at91_periph_clk_enable(ATMEL_ID_LCDC);
}
#ifdef CONFIG_LCD_INFO
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("2014 ATMEL Corp\n");
lcd_printf("at91@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);
return 0;
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#endif
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
static void sama5d4ek_serial3_hw_init(void)
@@ -196,9 +114,6 @@ int board_init(void)
#ifdef CONFIG_NAND_ATMEL
sama5d4ek_nand_hw_init();
#endif
#ifdef CONFIG_LCD
sama5d4ek_lcd_hw_init();
#endif
#ifdef CONFIG_CMD_USB
sama5d4ek_usb_hw_init();
#endif