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blk: Remove various places that do flush cache after read

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All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.

The underlying drivers should be responsible for the cache operation.
Remove these codes completely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Bin Meng 2017-09-12 19:00:23 -07:00 committed by Tom Rini
parent 6305db9604
commit 723b43daec
8 changed files with 0 additions and 31 deletions
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15
arch/arm/cpu/armv8/fsl-layerscape/ppa.c
View File

@ -107,9 +107,6 @@ int ppa_init(void)
return -EIO;
}
/* flush cache after read */
flush_cache((ulong)fitp, cnt * 512);
ret = fdt_check_header(fitp);
if (ret) {
free(fitp);
@ -134,9 +131,6 @@ int ppa_init(void)
}
debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
/* flush cache after read */
flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
#endif
@ -164,9 +158,6 @@ int ppa_init(void)
return -EIO;
}
/* flush cache after read */
flush_cache((ulong)ppa_fit_addr, cnt * 512);
#elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
struct fdt_header fit;
@ -208,9 +199,6 @@ int ppa_init(void)
}
debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
/* flush cache after read */
flush_cache((ulong)ppa_hdr_ddr, fw_length);
ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
#endif
@ -232,9 +220,6 @@ int ppa_init(void)
CONFIG_SYS_LS_PPA_FW_ADDR);
return -EIO;
}
/* flush cache after read */
flush_cache((ulong)ppa_fit_addr, fw_length);
#else
#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
#endif

2
board/toradex/common/tdx-cfg-block.c
View File

@ -129,8 +129,6 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
ret = -EIO;
goto out;
}
/* Flush cache after read */
flush_cache((ulong)(unsigned char *)config_block, 512);
} else {
/* Just writing one 512 byte block */
if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,

2
cmd/mmc.c
View File

@ -293,8 +293,6 @@ static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
curr_device, blk, cnt);
n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512); /* FIXME */
printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;

3
drivers/block/blk-uclass.c
View File

@ -294,9 +294,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
if (IS_ERR_VALUE(n))
return n;
/* flush cache after read */
flush_cache((ulong)buffer, blkcnt * desc->blksz);
return n;
}

3
drivers/block/blk_legacy.c
View File

@ -232,9 +232,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
if (IS_ERR_VALUE(n))
return n;
/* flush cache after read */
flush_cache((ulong)buffer, blkcnt * desc->blksz);
return n;
}

2
drivers/net/fm/fm.c
View File

@ -405,8 +405,6 @@ int fm_init_common(int index, struct ccsr_fman *reg)
mmc_init(mmc);
(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;

2
drivers/net/phy/cortina.c
View File

@ -177,8 +177,6 @@ void cs4340_upload_firmware(struct phy_device *phydev)
mmc_init(mmc);
(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
#endif

2
drivers/qe/qe.c
View File

@ -221,8 +221,6 @@ void u_qe_init(void)
mmc_init(mmc);
(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
addr);
/* flush cache after read */
flush_cache((ulong)addr, cnt * 512);
}
#endif
if (!u_qe_upload_firmware(addr))