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mpc83xx: Migrate CONFIG_SYS_IMMR to Kconfig

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Migrate CONFIG_SYS_IMMR to Kconfig for MPC83xx.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
Mario Six 2019-01-21 09:18:10 +01:00
parent be5abb0a83
commit 71da747431
33 changed files with 9 additions and 121 deletions
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7
arch/powerpc/cpu/mpc83xx/Kconfig
View File

@ -282,6 +282,13 @@ config ARCH_MPC837X
select MPC83XX_LDP_PIN select MPC83XX_LDP_PIN
select MPC83XX_SECOND_I2C_SUPPORT select MPC83XX_SECOND_I2C_SUPPORT
config SYS_IMMR
hex "Value for IMMR"
default 0xE0000000
help
Address for the Internal Memory-Mapped Registers (IMMR) window used
to configure the features of the SoC.
source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig" source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
source "arch/powerpc/cpu/mpc83xx/bats/Kconfig" source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig" source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"

1
configs/TQM834x_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_CLK_FREQ=66666000
CONFIG_MPC83xx=y CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y CONFIG_HIGH_BATS=y
CONFIG_TARGET_TQM834X=y CONFIG_TARGET_TQM834X=y
CONFIG_SYS_IMMR=0xff400000
CONFIG_DDR_MC_CLOCK_MODE_1_1=y CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_FACTOR_4_1=y CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_2_1=y CONFIG_CORE_PLL_RATIO_2_1=y

1
configs/ids8313_defconfig
View File

@ -4,6 +4,7 @@ CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y CONFIG_HIGH_BATS=y
CONFIG_TARGET_IDS8313=y CONFIG_TARGET_IDS8313=y
CONFIG_SYS_IMMR=0xF0000000
CONFIG_CORE_PLL_RATIO_2_1=y CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y

5
include/configs/MPC8308RDB.h
View File

@ -52,11 +52,6 @@
SICRL_I2C2_PF0 |\ SICRL_I2C2_PF0 |\
SICRL_ETSEC1_GTX_CLK125) /* 0x00000040 */ SICRL_ETSEC1_GTX_CLK125) /* 0x00000040 */
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* SERDES * SERDES
*/ */

2
include/configs/MPC8313ERDB_NAND.h
View File

@ -54,8 +54,6 @@
#define CONFIG_VSC7385_ENET #define CONFIG_VSC7385_ENET
#define CONFIG_TSEC2 #define CONFIG_TSEC2
#define CONFIG_SYS_IMMR 0xE0000000
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
#define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR #define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR
#endif #endif

2
include/configs/MPC8313ERDB_NOR.h
View File

@ -30,8 +30,6 @@
#define CONFIG_VSC7385_ENET #define CONFIG_VSC7385_ENET
#define CONFIG_TSEC2 #define CONFIG_TSEC2
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_SYS_MEMTEST_START 0x00001000 #define CONFIG_SYS_MEMTEST_START 0x00001000
#define CONFIG_SYS_MEMTEST_END 0x07f00000 #define CONFIG_SYS_MEMTEST_END 0x07f00000

5
include/configs/MPC8315ERDB.h
View File

@ -31,11 +31,6 @@
#define CONFIG_HWCONFIG #define CONFIG_HWCONFIG
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Arbiter Setup * Arbiter Setup
*/ */

5
include/configs/MPC8323ERDB.h
View File

@ -20,11 +20,6 @@
*/ */
#define CONFIG_SYS_SICRL 0x00000000 #define CONFIG_SYS_SICRL 0x00000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* System performance * System performance
*/ */

5
include/configs/MPC832XEMDS.h
View File

@ -17,11 +17,6 @@
*/ */
#define CONFIG_SYS_SICRL 0x00000000 #define CONFIG_SYS_SICRL 0x00000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* DDR Setup * DDR Setup
*/ */

2
include/configs/MPC8349EMDS.h
View File

@ -17,8 +17,6 @@
*/ */
#define CONFIG_E300 1 /* E300 Family */ #define CONFIG_E300 1 /* E300 Family */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00100000

2
include/configs/MPC8349EMDS_SDRAM.h
View File

@ -17,8 +17,6 @@
*/ */
#define CONFIG_E300 1 /* E300 Family */ #define CONFIG_E300 1 /* E300 Family */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00100000

5
include/configs/MPC8349ITX.h
View File

@ -39,11 +39,6 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
/*
* High Level Configuration Options
*/
#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
#define CONFIG_MISC_INIT_F #define CONFIG_MISC_INIT_F
/* /*

5
include/configs/MPC837XEMDS.h
View File

@ -39,11 +39,6 @@
#define CONFIG_HWCONFIG #define CONFIG_HWCONFIG
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* DDR Setup * DDR Setup
*/ */

5
include/configs/MPC837XERDB.h
View File

@ -46,11 +46,6 @@
*/ */
#define CONFIG_SYS_OBIR 0x30100000 #define CONFIG_SYS_OBIR 0x30100000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Device configurations * Device configurations
*/ */

3
include/configs/TQM834x.h
View File

@ -16,9 +16,6 @@
*/ */
#define CONFIG_E300 1 /* E300 Family */ #define CONFIG_E300 1 /* E300 Family */
/* IMMR Base Address Register, use Freescale default: 0xff400000 */
#define CONFIG_SYS_IMMR 0xff400000
/* /*
* Local Bus LCRR * Local Bus LCRR
* LCRR: DLL bypass, Clock divider is 8 * LCRR: DLL bypass, Clock divider is 8

2
include/configs/caddy2.h
View File

@ -25,8 +25,6 @@
/* Don't enable PCI2 on vme834x - it doesn't exist physically. */ /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00100000

5
include/configs/hrcon.h
View File

@ -40,11 +40,6 @@
SICRL_I2C2_PF0 |\ SICRL_I2C2_PF0 |\
SICRL_ETSEC1_GTX_CLK125) /* 0x00000000 */ SICRL_ETSEC1_GTX_CLK125) /* 0x00000000 */
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* SERDES * SERDES
*/ */

2
include/configs/ids8313.h
View File

@ -20,8 +20,6 @@
#define CONFIG_BOOT_RETRY_MIN 30 #define CONFIG_BOOT_RETRY_MIN 30
#define CONFIG_RESET_TO_RETRY #define CONFIG_RESET_TO_RETRY
#define CONFIG_SYS_IMMR 0xF0000000
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */

5
include/configs/kmcoge5ne.h
View File

@ -40,11 +40,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmeter1.h
View File

@ -25,11 +25,6 @@
#include "km/keymile-common.h" #include "km/keymile-common.h"
#include "km/km-powerpc.h" #include "km/km-powerpc.h"
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmopti2.h
View File

@ -45,11 +45,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmsupx5.h
View File

@ -45,11 +45,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmtegr1.h
View File

@ -52,11 +52,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmtepr2.h
View File

@ -45,11 +45,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/kmvect1.h
View File

@ -44,11 +44,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/mpc8308_p1m.h
View File

@ -55,11 +55,6 @@
*/ */
#define CONFIG_SYS_GPIO1_DAT 0x08008C00 #define CONFIG_SYS_GPIO1_DAT 0x08008C00
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* SERDES * SERDES
*/ */

2
include/configs/sbc8349.h
View File

@ -22,8 +22,6 @@
/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */ /* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00100000

5
include/configs/strider.h
View File

@ -40,11 +40,6 @@
SICRL_I2C2_PF0 |\ SICRL_I2C2_PF0 |\
SICRL_ETSEC1_TX_CLK) /* 0x00000000 */ SICRL_ETSEC1_TX_CLK) /* 0x00000000 */
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* SERDES * SERDES
*/ */

5
include/configs/suvd3.h
View File

@ -42,11 +42,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/tuge1.h
View File

@ -45,11 +45,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

5
include/configs/tuxx1.h
View File

@ -45,11 +45,6 @@
#define CONFIG_SYS_CLK_FREQ 66000000 #define CONFIG_SYS_CLK_FREQ 66000000
#define CONFIG_83XX_PCICLK 66000000 #define CONFIG_83XX_PCICLK 66000000
/*
* IMMR new address
*/
#define CONFIG_SYS_IMMR 0xE0000000
/* /*
* Bus Arbitration Configuration Register (ACR) * Bus Arbitration Configuration Register (ACR)
*/ */

2
include/configs/ve8313.h
View File

@ -24,8 +24,6 @@
* On-board devices * On-board devices
* *
*/ */
#define CONFIG_SYS_IMMR 0xE0000000
#define CONFIG_SYS_MEMTEST_START 0x00001000 #define CONFIG_SYS_MEMTEST_START 0x00001000
#define CONFIG_SYS_MEMTEST_END 0x07000000 #define CONFIG_SYS_MEMTEST_END 0x07000000

2
include/configs/vme8349.h
View File

@ -25,8 +25,6 @@
/* Don't enable PCI2 on vme834x - it doesn't exist physically. */ /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00100000 #define CONFIG_SYS_MEMTEST_END 0x00100000