mpc83xx: Migrate CONFIG_SYS_IMMR to Kconfig
Migrate CONFIG_SYS_IMMR to Kconfig for MPC83xx. Signed-off-by: Mario Six <mario.six@gdsys.cc>
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be5abb0a83
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71da747431
@ -282,6 +282,13 @@ config ARCH_MPC837X
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select MPC83XX_LDP_PIN
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select MPC83XX_SECOND_I2C_SUPPORT
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config SYS_IMMR
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hex "Value for IMMR"
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default 0xE0000000
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help
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Address for the Internal Memory-Mapped Registers (IMMR) window used
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to configure the features of the SoC.
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source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
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source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
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@ -4,6 +4,7 @@ CONFIG_SYS_CLK_FREQ=66666000
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CONFIG_MPC83xx=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_TQM834X=y
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CONFIG_SYS_IMMR=0xff400000
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CONFIG_DDR_MC_CLOCK_MODE_1_1=y
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CONFIG_SYSTEM_PLL_FACTOR_4_1=y
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CONFIG_CORE_PLL_RATIO_2_1=y
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@ -4,6 +4,7 @@ CONFIG_SYS_CLK_FREQ=66000000
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CONFIG_MPC83xx=y
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CONFIG_HIGH_BATS=y
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CONFIG_TARGET_IDS8313=y
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CONFIG_SYS_IMMR=0xF0000000
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CONFIG_CORE_PLL_RATIO_2_1=y
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CONFIG_PCI_HOST_MODE_ENABLE=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
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@ -52,11 +52,6 @@
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SICRL_I2C2_PF0 |\
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SICRL_ETSEC1_GTX_CLK125) /* 0x00000040 */
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* SERDES
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*/
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@ -54,8 +54,6 @@
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#define CONFIG_VSC7385_ENET
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#define CONFIG_TSEC2
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#define CONFIG_SYS_IMMR 0xE0000000
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#if !defined(CONFIG_SPL_BUILD)
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#define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR
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#endif
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@ -30,8 +30,6 @@
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#define CONFIG_VSC7385_ENET
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#define CONFIG_TSEC2
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#define CONFIG_SYS_IMMR 0xE0000000
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#define CONFIG_SYS_MEMTEST_START 0x00001000
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#define CONFIG_SYS_MEMTEST_END 0x07f00000
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@ -31,11 +31,6 @@
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#define CONFIG_HWCONFIG
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Arbiter Setup
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*/
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@ -20,11 +20,6 @@
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*/
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#define CONFIG_SYS_SICRL 0x00000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* System performance
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*/
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@ -17,11 +17,6 @@
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*/
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#define CONFIG_SYS_SICRL 0x00000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* DDR Setup
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*/
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@ -17,8 +17,6 @@
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_SYS_IMMR 0xE0000000
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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@ -17,8 +17,6 @@
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_SYS_IMMR 0xE0000000
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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@ -39,11 +39,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
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#define CONFIG_MISC_INIT_F
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/*
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@ -39,11 +39,6 @@
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#define CONFIG_HWCONFIG
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* DDR Setup
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*/
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@ -46,11 +46,6 @@
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*/
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#define CONFIG_SYS_OBIR 0x30100000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Device configurations
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*/
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@ -16,9 +16,6 @@
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*/
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#define CONFIG_E300 1 /* E300 Family */
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/* IMMR Base Address Register, use Freescale default: 0xff400000 */
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#define CONFIG_SYS_IMMR 0xff400000
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/*
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* Local Bus LCRR
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* LCRR: DLL bypass, Clock divider is 8
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@ -25,8 +25,6 @@
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/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
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#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
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#define CONFIG_SYS_IMMR 0xE0000000
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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@ -40,11 +40,6 @@
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SICRL_I2C2_PF0 |\
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SICRL_ETSEC1_GTX_CLK125) /* 0x00000000 */
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* SERDES
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*/
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@ -20,8 +20,6 @@
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#define CONFIG_BOOT_RETRY_MIN 30
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#define CONFIG_RESET_TO_RETRY
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#define CONFIG_SYS_IMMR 0xF0000000
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#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
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#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
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@ -40,11 +40,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -25,11 +25,6 @@
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#include "km/keymile-common.h"
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#include "km/km-powerpc.h"
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -45,11 +45,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -52,11 +52,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -45,11 +45,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -55,11 +55,6 @@
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*/
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#define CONFIG_SYS_GPIO1_DAT 0x08008C00
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* SERDES
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*/
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@ -22,8 +22,6 @@
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/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
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#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
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#define CONFIG_SYS_IMMR 0xE0000000
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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SICRL_I2C2_PF0 |\
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SICRL_ETSEC1_TX_CLK) /* 0x00000000 */
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* SERDES
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*/
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@ -42,11 +42,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -45,11 +45,6 @@
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define CONFIG_83XX_PCICLK 66000000
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/*
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* IMMR new address
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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/*
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* Bus Arbitration Configuration Register (ACR)
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*/
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@ -24,8 +24,6 @@
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* On-board devices
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*
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*/
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#define CONFIG_SYS_IMMR 0xE0000000
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#define CONFIG_SYS_MEMTEST_START 0x00001000
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#define CONFIG_SYS_MEMTEST_END 0x07000000
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@ -25,8 +25,6 @@
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/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
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#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
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#define CONFIG_SYS_IMMR 0xE0000000
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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