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cosmetic: checkpatch cleanup of arch/x86/cpu/*.c

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Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This commit is contained in:
Graeme Russ 2011-11-08 02:33:13 +00:00
parent 6d7404c4c1
commit 717979fdd7
2 changed files with 30 additions and 23 deletions
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22
arch/x86/cpu/cpu.c
View File

@ -52,7 +52,7 @@
struct gdt_ptr { struct gdt_ptr {
u16 len; u16 len;
u32 ptr; u32 ptr;
} __attribute__((packed)); } __packed;
static void reload_gdt(void) static void reload_gdt(void)
{ {
@ -115,14 +115,14 @@ int x86_cpu_init_r(void)
reload_gdt(); reload_gdt();
/* Initialize core interrupt and exception functionality of CPU */ /* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts (); cpu_init_interrupts();
return 0; return 0;
} }
int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{ {
printf ("resetting ...\n"); printf("resetting ...\n");
/* wait 50 ms */ /* wait 50 ms */
udelay(50000); udelay(50000);
@ -133,7 +133,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 0; return 0;
} }
void flush_cache (unsigned long dummy1, unsigned long dummy2) void flush_cache(unsigned long dummy1, unsigned long dummy2)
{ {
asm("wbinvd\n"); asm("wbinvd\n");
} }
@ -142,16 +142,16 @@ void __attribute__ ((regparm(0))) generate_gpf(void);
/* segment 0x70 is an arbitrary segment which does not exist */ /* segment 0x70 is an arbitrary segment which does not exist */
asm(".globl generate_gpf\n" asm(".globl generate_gpf\n"
".hidden generate_gpf\n" ".hidden generate_gpf\n"
".type generate_gpf, @function\n" ".type generate_gpf, @function\n"
"generate_gpf:\n" "generate_gpf:\n"
"ljmp $0x70, $0x47114711\n"); "ljmp $0x70, $0x47114711\n");
void __reset_cpu(ulong addr) void __reset_cpu(ulong addr)
{ {
printf("Resetting using x86 Triple Fault\n"); printf("Resetting using x86 Triple Fault\n");
set_vector(13, generate_gpf); /* general protection fault handler */ set_vector(13, generate_gpf); /* general protection fault handler */
set_vector(8, generate_gpf); /* double fault handler */ set_vector(8, generate_gpf); /* double fault handler */
generate_gpf(); /* start the show */ generate_gpf(); /* start the show */
} }
void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));

31
arch/x86/cpu/interrupts.c
View File

@ -31,6 +31,7 @@
#include <asm/interrupt.h> #include <asm/interrupt.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/processor-flags.h> #include <asm/processor-flags.h>
#include <linux/compiler.h>
#define DECLARE_INTERRUPT(x) \ #define DECLARE_INTERRUPT(x) \
".globl irq_"#x"\n" \ ".globl irq_"#x"\n" \
@ -83,22 +84,22 @@ static inline unsigned long get_debugreg(int regno)
switch (regno) { switch (regno) {
case 0: case 0:
asm("mov %%db0, %0" :"=r" (val)); asm("mov %%db0, %0" : "=r" (val));
break; break;
case 1: case 1:
asm("mov %%db1, %0" :"=r" (val)); asm("mov %%db1, %0" : "=r" (val));
break; break;
case 2: case 2:
asm("mov %%db2, %0" :"=r" (val)); asm("mov %%db2, %0" : "=r" (val));
break; break;
case 3: case 3:
asm("mov %%db3, %0" :"=r" (val)); asm("mov %%db3, %0" : "=r" (val));
break; break;
case 6: case 6:
asm("mov %%db6, %0" :"=r" (val)); asm("mov %%db6, %0" : "=r" (val));
break; break;
case 7: case 7:
asm("mov %%db7, %0" :"=r" (val)); asm("mov %%db7, %0" : "=r" (val));
break; break;
default: default:
val = 0; val = 0;
@ -120,7 +121,8 @@ void dump_regs(struct irq_regs *regs)
printf("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", printf("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
regs->esi, regs->edi, regs->ebp, regs->esp); regs->esi, regs->edi, regs->ebp, regs->esp);
printf(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n", printf(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
(u16)regs->xds, (u16)regs->xes, (u16)regs->xfs, (u16)regs->xgs, (u16)regs->xss); (u16)regs->xds, (u16)regs->xes, (u16)regs->xfs,
(u16)regs->xgs, (u16)regs->xss);
cr0 = read_cr0(); cr0 = read_cr0();
cr2 = read_cr2(); cr2 = read_cr2();
@ -164,13 +166,13 @@ struct idt_entry {
u8 res; u8 res;
u8 access; u8 access;
u16 base_high; u16 base_high;
} __attribute__ ((packed)); } __packed;
struct desc_ptr { struct desc_ptr {
unsigned short size; unsigned short size;
unsigned long address; unsigned long address;
unsigned short segment; unsigned short segment;
} __attribute__((packed)); } __packed;
struct idt_entry idt[256]; struct idt_entry idt[256];
@ -178,7 +180,7 @@ struct desc_ptr idt_ptr;
static inline void load_idt(const struct desc_ptr *dtr) static inline void load_idt(const struct desc_ptr *dtr)
{ {
asm volatile("cs lidt %0"::"m" (*dtr)); asm volatile("cs lidt %0" : : "m" (*dtr));
} }
void set_vector(u8 intnum, void *routine) void set_vector(u8 intnum, void *routine)
@ -187,6 +189,11 @@ void set_vector(u8 intnum, void *routine)
idt[intnum].base_low = (u16)((u32)(routine) & 0xffff); idt[intnum].base_low = (u16)((u32)(routine) & 0xffff);
} }
/*
* Ideally these would be defined static to avoid a checkpatch warning, but
* the compiler cannot see them in the inline asm and complains that they
* aren't defined
*/
void irq_0(void); void irq_0(void);
void irq_1(void); void irq_1(void);
@ -201,7 +208,7 @@ int cpu_init_interrupts(void)
disable_interrupts(); disable_interrupts();
/* Setup the IDT */ /* Setup the IDT */
for (i=0;i<256;i++) { for (i = 0; i < 256; i++) {
idt[i].access = 0x8e; idt[i].access = 0x8e;
idt[i].res = 0; idt[i].res = 0;
idt[i].selector = 0x10; idt[i].selector = 0x10;
@ -238,7 +245,7 @@ int disable_interrupts(void)
asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : ); asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : );
return flags & X86_EFLAGS_IF; /* IE flags is bit 9 */ return flags & X86_EFLAGS_IF;
} }
/* IRQ Low-Level Service Routine */ /* IRQ Low-Level Service Routine */