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* Add support for SK98xx driver

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* Add PCI support for SL8245 board

* Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB)
  or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
  Run IPB at 133 Mhz; adjust the MII clock frequency accordingly

* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16  MHz)
  to allow for more accurate baudrate settings
  (error now 0.7% at 115 kbps, instead of 3.5% before)

* Patch by Andreas Mohr, 4 Sep 2003:
  Fix a lot of spelling errors
This commit is contained in:
wdenk
2003-09-05 23:19:14 +00:00
parent 4d816774f1
commit 7152b1d0b3
61 changed files with 45560 additions and 63 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
cpu/mpc5xxx/cpu_init.c
View File

@@ -24,14 +24,6 @@
#include <common.h>
#include <mpc5xxx.h>
#if defined(CONFIG_MGT5100)
#define START_REG(start) ((start) >> 15)
#define STOP_REG(start, size) (((start) + (size) - 1) >> 15)
#elif defined(CONFIG_MPC5200)
#define START_REG(start) ((start) >> 16)
#define STOP_REG(start, size) (((start) + (size) - 1) >> 16)
#endif
/*
* Breath some life into the CPU...
*
@@ -159,6 +151,14 @@ void cpu_init_f (void)
#if defined(CONFIG_MPC5200)
/* enable timebase */
*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
/* Motorola reports IPB should better run at 133 MHz. */
*(vu_long *)MPC5XXX_ADDECR |= 1;
/* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */
addecr = *(vu_long *)MPC5XXX_CDM_CFG;
addecr &= ~0x103;
addecr |= 0x02;
*(vu_long *)MPC5XXX_CDM_CFG = addecr;
#endif
}

5
cpu/mpc5xxx/fec.c
View File

@@ -208,6 +208,7 @@ static void mpc5xxx_fec_set_hwaddr(mpc5xxx_fec_priv *fec, char *mac)
/********************************************************************/
static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
{
DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
const uint8 phyAddr = 0; /* Only one PHY */
@@ -269,10 +270,10 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
fec->eth->x_cntrl = 0x00000004; /* full-duplex, heartbeat disabled */
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock(25Mhz)
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
fec->eth->mii_speed = (0x5 << 1); /* No MII for 7-wire mode */
fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
}
/*