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powerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple

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Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Shaveta Leekha 2013-03-25 07:40:24 +00:00 committed by Andy Fleming
parent e14cdc0a69
commit 6eaeba23dd
3 changed files with 14 additions and 0 deletions
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2
arch/powerpc/include/asm/fsl_law.h
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@ -70,6 +70,8 @@ enum law_trgt_if {
LAW_TRGT_IF_DCSR = 0x1d,
LAW_TRGT_IF_LBC = 0x1f,
LAW_TRGT_IF_QMAN = 0x3c,
LAW_TRGT_IF_MAPLE = 0x50,
};
#define LAW_TRGT_IF_DDR LAW_TRGT_IF_DDR_1
#define LAW_TRGT_IF_IFC LAW_TRGT_IF_LBC

3
board/freescale/b4860qds/law.c
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@ -33,6 +33,9 @@ struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
#endif
SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
#ifdef CONFIG_SYS_MAPLE_MEM_PHYS
SET_LAW(CONFIG_SYS_MAPLE_MEM_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_MAPLE),
#endif
#ifdef CONFIG_SYS_DCSRBAR_PHYS
/* Limit DCSR to 32M to access NPC Trace Buffer */
SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),

9
include/configs/B4860QDS.h
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@ -526,6 +526,15 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SF_DEFAULT_SPEED 10000000
#define CONFIG_SF_DEFAULT_MODE 0
/*
* MAPLE
*/
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_MAPLE_MEM_PHYS 0xFA0000000ull
#else
#define CONFIG_SYS_MAPLE_MEM_PHYS 0xA0000000
#endif
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.