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x86: Remove support for Advantech SOM-6896

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Now that we have generic coreboot payload support, remove the
dedicated support for Advantech SOM-6896.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Bin Meng
2018-08-10 02:39:34 -07:00
parent ceeee8f7b5
commit 6e71a6ab2d
3 changed files with 0 additions and 79 deletions
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1
arch/x86/dts/Makefile
View File

@@ -18,7 +18,6 @@ dtb-y += bayleybay.dtb \
qemu-x86_i440fx.dtb \
qemu-x86_q35.dtb \
theadorable-x86-dfi-bt700.dtb \
broadwell_som-6896.dtb \
baytrail_som-db5800-som-6867.dtb
targets += $(dtb-y)

52
arch/x86/dts/broadwell_som-6896.dts
View File

@@ -1,52 +0,0 @@
/dts-v1/;
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/include/ "coreboot_fb.dtsi"
/ {
model = "Advantech SOM-6896";
compatible = "advantech,som-6896", "intel,broadwell";
aliases {
spi0 = &spi;
};
config {
silent_console = <0>;
};
chosen {
stdout-path = "/serial";
};
pci {
compatible = "pci-x86";
#address-cells = <3>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich9-spi";
spi-flash@0 {
reg = <0>;
compatible = "winbond,w25q128", "spi-flash";
memory-map = <0xff000000 0x01000000>;
};
};
};
};
};