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clk: Allow force setting clock defaults before relocation

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Since 291da96b8e ("clk: Allow clock defaults to be set during re-reloc
state for SPL only") it has been impossible to set clock defaults before
relocation. This is annoying on boards without SPL, since there is no way
to set clock defaults before U-Boot proper. In particular, the aisram rate
must be changed before relocation on the K210, since U-Boot will hang if we
try and change the rate while we are using aisram.

To get around this, extend the stage parameter to allow force setting
defaults, even if they would be otherwise postponed for later. A device
tree property was decided against because of the concerns in the original
commit thread about the overhead of repeatedly parsing the device tree.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Sean Anderson
2021-06-11 00:16:07 -04:00
committed by Leo Yu-Chi Liang
parent 173c3bcd7d
commit 6e33eba59f
5 changed files with 46 additions and 17 deletions
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2
drivers/net/gmac_rockchip.c
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@@ -565,7 +565,7 @@ static int gmac_rockchip_probe(struct udevice *dev)
ulong rate;
int ret;
ret = clk_set_defaults(dev, 0);
ret = clk_set_defaults(dev, CLK_DEFAULTS_PRE);
if (ret)
debug("%s clk_set_defaults failed %d\n", __func__, ret);