serial: uniphier: drop platform data support
This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now selects OF_CONTROL and SPL_OF_CONTROL. This driver no longer needs to support platform data configuration. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
@@ -8,7 +8,6 @@
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#include <linux/serial_reg.h>
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#include <linux/serial_reg.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <dm/device.h>
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#include <dm/device.h>
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#include <dm/platform_data/serial-uniphier.h>
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#include <mapmem.h>
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#include <mapmem.h>
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#include <serial.h>
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#include <serial.h>
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#include <fdtdec.h>
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#include <fdtdec.h>
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@@ -34,6 +33,7 @@ struct uniphier_serial {
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struct uniphier_serial_private_data {
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struct uniphier_serial_private_data {
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struct uniphier_serial __iomem *membase;
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struct uniphier_serial __iomem *membase;
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unsigned int uartclk;
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};
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};
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#define uniphier_serial_port(dev) \
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#define uniphier_serial_port(dev) \
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@@ -41,12 +41,12 @@ struct uniphier_serial_private_data {
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static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
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static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
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{
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{
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struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
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struct uniphier_serial_private_data *priv = dev_get_priv(dev);
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struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
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struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
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const unsigned int mode_x_div = 16;
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const unsigned int mode_x_div = 16;
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unsigned int divisor;
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unsigned int divisor;
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divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
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divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
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writel(divisor, &port->dlr);
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writel(divisor, &port->dlr);
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@@ -87,17 +87,24 @@ static int uniphier_serial_pending(struct udevice *dev, bool input)
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static int uniphier_serial_probe(struct udevice *dev)
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static int uniphier_serial_probe(struct udevice *dev)
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{
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{
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u32 tmp;
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DECLARE_GLOBAL_DATA_PTR;
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struct uniphier_serial_private_data *priv = dev_get_priv(dev);
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struct uniphier_serial_private_data *priv = dev_get_priv(dev);
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struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
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struct uniphier_serial __iomem *port;
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struct uniphier_serial __iomem *port;
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fdt_addr_t base;
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fdt_size_t size;
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u32 tmp;
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port = map_sysmem(plat->base, sizeof(struct uniphier_serial));
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base = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size);
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port = map_sysmem(base, size);
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if (!port)
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if (!port)
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return -ENOMEM;
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return -ENOMEM;
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priv->membase = port;
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priv->membase = port;
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priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"clock-frequency", 0);
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tmp = readl(&port->lcr_mcr);
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tmp = readl(&port->lcr_mcr);
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tmp &= ~LCR_MASK;
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tmp &= ~LCR_MASK;
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tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
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tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
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@@ -113,25 +120,11 @@ static int uniphier_serial_remove(struct udevice *dev)
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return 0;
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return 0;
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}
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct udevice_id uniphier_uart_of_match[] = {
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static const struct udevice_id uniphier_uart_of_match[] = {
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{ .compatible = "socionext,uniphier-uart" },
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{ .compatible = "socionext,uniphier-uart" },
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{ /* sentinel */ }
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{ /* sentinel */ }
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};
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};
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static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
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DECLARE_GLOBAL_DATA_PTR;
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plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
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plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"clock-frequency", 0);
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return 0;
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}
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#endif
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static const struct dm_serial_ops uniphier_serial_ops = {
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static const struct dm_serial_ops uniphier_serial_ops = {
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.setbrg = uniphier_serial_setbrg,
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.setbrg = uniphier_serial_setbrg,
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.getc = uniphier_serial_getc,
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.getc = uniphier_serial_getc,
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@@ -140,15 +133,11 @@ static const struct dm_serial_ops uniphier_serial_ops = {
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};
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};
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U_BOOT_DRIVER(uniphier_serial) = {
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U_BOOT_DRIVER(uniphier_serial) = {
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.name = DRIVER_NAME,
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.name = "uniphier-uart",
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.id = UCLASS_SERIAL,
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.id = UCLASS_SERIAL,
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.of_match = of_match_ptr(uniphier_uart_of_match),
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.of_match = uniphier_uart_of_match,
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.ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
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.probe = uniphier_serial_probe,
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.probe = uniphier_serial_probe,
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.remove = uniphier_serial_remove,
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.remove = uniphier_serial_remove,
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.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
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.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
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.platdata_auto_alloc_size =
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sizeof(struct uniphier_serial_platform_data),
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.ops = &uniphier_serial_ops,
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.ops = &uniphier_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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};
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@@ -1,18 +0,0 @@
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/*
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* Copyright (C) 2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __PLAT_UNIPHIER_SERIAL_H
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#define __PLAT_UNIPHIER_SERIAL_H
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#define DRIVER_NAME "uniphier-uart"
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struct uniphier_serial_platform_data {
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unsigned long base;
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unsigned int uartclk;
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};
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#endif /* __PLAT_UNIPHIER_SERIAL_H */
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