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ARM: OMAP: Change set_pl310_ctrl_reg to be generic

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set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
PL310 control register, however, that is something that is generic
enough to be used for OMAP5 generation of processors as well. The only
difference being the service being invoked for the function.

So, convert the service to a macro and use a generic name (same as
that used in Linux for some consistency). While at that, also add a
data barrier which is necessary as per recommendation.

While at this, smc #0 is maintained as handcoded assembly thanks to
various gcc version eccentricities, discussion thread:
http://marc.info/?t=142542166800001&r=1&w=2

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Nishanth Menon 2015-03-09 17:12:03 -05:00 committed by Tom Rini
parent 9b4d65f918
commit 6d8abe6a8a
4 changed files with 18 additions and 10 deletions
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18
arch/arm/cpu/armv7/omap-common/lowlevel_init.S
View File

@ -22,11 +22,15 @@ ENTRY(save_boot_params)
b save_boot_params_ret b save_boot_params_ret
ENDPROC(save_boot_params) ENDPROC(save_boot_params)
ENTRY(set_pl310_ctrl_reg) ENTRY(omap_smc1)
PUSH {r4-r11, lr} @ save registers - ROM code may pollute PUSH {r4-r12, lr} @ save registers - ROM code may pollute
@ our registers @ our registers
LDR r12, =0x102 @ Set PL310 control register - value in R0 MOV r12, r0 @ Service
.word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5 MOV r0, r1 @ Argument
@ call ROM Code API to set control register DSB
POP {r4-r11, pc} DMB
ENDPROC(set_pl310_ctrl_reg) .word 0xe1600070 @ SMC #0 - hand assembled for GCC versions
@ call ROM Code API for the service requested
POP {r4-r12, pc}
ENDPROC(omap_smc1)

4
arch/arm/cpu/armv7/omap4/hwinit.c
View File

@ -159,11 +159,11 @@ void init_omap_revision(void)
#ifndef CONFIG_SYS_L2CACHE_OFF #ifndef CONFIG_SYS_L2CACHE_OFF
void v7_outer_cache_enable(void) void v7_outer_cache_enable(void)
{ {
set_pl310_ctrl_reg(1); omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 1);
} }
void v7_outer_cache_disable(void) void v7_outer_cache_disable(void)
{ {
set_pl310_ctrl_reg(0); omap_smc1(OMAP4_SERVICE_PL310_CONTROL_REG_SET, 0);
} }
#endif /* !CONFIG_SYS_L2CACHE_OFF */ #endif /* !CONFIG_SYS_L2CACHE_OFF */

4
arch/arm/include/asm/arch-omap4/sys_proto.h
View File

@ -37,7 +37,6 @@ void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
void set_muxconf_regs_essential(void); void set_muxconf_regs_essential(void);
u32 wait_on_value(u32, u32, void *, u32); u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long); void sdelay(unsigned long);
void set_pl310_ctrl_reg(u32 val);
void setup_clocks_for_console(void); void setup_clocks_for_console(void);
void prcm_init(void); void prcm_init(void);
void bypass_dpll(u32 const base); void bypass_dpll(u32 const base);
@ -57,4 +56,7 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
u32 warm_reset(void); u32 warm_reset(void);
void force_emif_self_refresh(void); void force_emif_self_refresh(void);
void setup_warmreset_time(void); void setup_warmreset_time(void);
#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
#endif #endif

2
arch/arm/include/asm/omap_common.h
View File

@ -579,6 +579,8 @@ s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb);
void usb_fake_mac_from_die_id(u32 *id); void usb_fake_mac_from_die_id(u32 *id);
void omap_smc1(u32 service, u32 val);
/* ABB */ /* ABB */
#define OMAP_ABB_NOMINAL_OPP 0 #define OMAP_ABB_NOMINAL_OPP 0
#define OMAP_ABB_FAST_OPP 1 #define OMAP_ABB_FAST_OPP 1