Add support for AMCC 440SPe CPU based eval board (Yucca).
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@@ -470,4 +470,45 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower);
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#define LAWAR_SIZE_1G (LAWAR_SIZE_BASE+19)
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#define LAWAR_SIZE_2G (LAWAR_SIZE_BASE+20)
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#ifdef CONFIG_440SPE
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/*----------------------------------------------------------------------------+
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| Following instructions are not available in Book E mode of the GNU assembler.
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+----------------------------------------------------------------------------*/
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#define DCCCI(ra,rb) .long 0x7c000000|\
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(ra<<16)|(rb<<11)|(454<<1)
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#define ICCCI(ra,rb) .long 0x7c000000|\
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(ra<<16)|(rb<<11)|(966<<1)
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#define DCREAD(rt,ra,rb) .long 0x7c000000|\
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(rt<<21)|(ra<<16)|(rb<<11)|(486<<1)
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#define ICREAD(ra,rb) .long 0x7c000000|\
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(ra<<16)|(rb<<11)|(998<<1)
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#define TLBSX(rt,ra,rb) .long 0x7c000000|\
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(rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
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#define TLBWE(rs,ra,ws) .long 0x7c000000|\
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(rs<<21)|(ra<<16)|(ws<<11)|(978<<1)
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#define TLBRE(rt,ra,ws) .long 0x7c000000|\
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(rt<<21)|(ra<<16)|(ws<<11)|(946<<1)
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#define TLBSXDOT(rt,ra,rb) .long 0x7c000001|\
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(rt<<21)|(ra<<16)|(rb<<11)|(914<<1)
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#define MSYNC .long 0x7c000000|\
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(598<<1)
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#define MBAR_INST .long 0x7c000000|\
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(854<<1)
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/*----------------------------------------------------------------------------+
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| Following instruction is not available in PPC405 mode of the GNU assembler.
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+----------------------------------------------------------------------------*/
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#define TLBRE(rt,ra,ws) .long 0x7c000000|\
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(rt<<21)|(ra<<16)|(ws<<11)|(946<<1)
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#endif
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#endif /* _PPC_MMU_H_ */
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