ppc: Remove T1023RBD boards and T1024RDB_SECURE_BOOT
These boards have not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove them. As this is the only ARCH_T1023 platform left, remove that support as well. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -113,16 +113,6 @@ config TARGET_QEMU_PPCE500
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select ARCH_QEMU_E500
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select PHYS_64BIT
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config TARGET_T1023RDB
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bool "Support T1023RDB"
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select ARCH_T1023
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE
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imply CMD_EEPROM
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imply PANIC_HANG
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config TARGET_T1024RDB
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bool "Support T1024RDB"
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select ARCH_T1024
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@@ -692,27 +682,6 @@ config ARCH_P5040
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config ARCH_QEMU_E500
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bool
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config ARCH_T1023
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bool
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select E500MC
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select FSL_LAW
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select SYS_FSL_DDR_VER_50
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select SYS_FSL_ERRATUM_A008378
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select SYS_FSL_ERRATUM_A008109
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select SYS_FSL_ERRATUM_A009663
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select SYS_FSL_ERRATUM_A009942
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select SYS_FSL_ERRATUM_ESDHC111
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select SYS_FSL_HAS_DDR3
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select SYS_FSL_HAS_DDR4
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select SYS_FSL_HAS_SEC
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select SYS_FSL_QORIQ_CHASSIS2
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select SYS_FSL_SEC_BE
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select SYS_FSL_SEC_COMPAT_5
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select FSL_IFC
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imply CMD_EEPROM
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imply CMD_NAND
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imply CMD_REGINFO
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config ARCH_T1024
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bool
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select E500MC
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@@ -916,7 +885,6 @@ config MAX_CPUS
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ARCH_P1024 || \
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ARCH_P1025 || \
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ARCH_P2020 || \
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ARCH_T1023 || \
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ARCH_T1024
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default 1
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help
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@@ -952,7 +920,6 @@ config SYS_CCSRBAR_DEFAULT
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ARCH_P3041 || \
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ARCH_P4080 || \
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ARCH_P5040 || \
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ARCH_T1023 || \
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ARCH_T1024 || \
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ARCH_T1040 || \
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ARCH_T1042 || \
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@@ -1144,8 +1111,7 @@ config SYS_FSL_NUM_LAWS
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ARCH_T2080 || \
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ARCH_T4160 || \
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ARCH_T4240
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default 16 if ARCH_T1023 || \
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ARCH_T1024 || \
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default 16 if ARCH_T1024 || \
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ARCH_T1040 || \
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ARCH_T1042
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default 12 if ARCH_BSC9131 || \
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@@ -1224,7 +1190,6 @@ config SYS_FSL_IFC_CLK_DIV
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default 2 if ARCH_B4420 || \
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ARCH_B4860 || \
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ARCH_T1024 || \
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ARCH_T1023 || \
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ARCH_T1040 || \
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ARCH_T1042 || \
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ARCH_T4160 || \
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@@ -47,7 +47,6 @@ obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
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obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
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obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
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obj-$(CONFIG_ARCH_T1042) += t1040_ids.o
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obj-$(CONFIG_ARCH_T1023) += t1024_ids.o
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obj-$(CONFIG_ARCH_T1024) += t1024_ids.o
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obj-$(CONFIG_ARCH_T2080) += t2080_ids.o
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@@ -83,7 +82,6 @@ obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
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obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
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obj-$(CONFIG_ARCH_T1040) += t1040_serdes.o
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obj-$(CONFIG_ARCH_T1042) += t1040_serdes.o
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obj-$(CONFIG_ARCH_T1023) += t1024_serdes.o
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obj-$(CONFIG_ARCH_T1024) += t1024_serdes.o
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obj-$(CONFIG_ARCH_T2080) += t2080_serdes.o
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@@ -201,7 +201,7 @@ void get_sys_info(sys_info_t *sys_info)
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defined(CONFIG_ARCH_T2080)
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#define FM1_CLK_SEL 0xe0000000
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#define FM1_CLK_SHIFT 29
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#elif defined(CONFIG_ARCH_T1024)
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#define FM1_CLK_SEL 0x00000007
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#define FM1_CLK_SHIFT 0
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#else
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@@ -211,7 +211,7 @@ void get_sys_info(sys_info_t *sys_info)
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#define FM1_CLK_SHIFT 26
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#endif
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#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
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#if defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#if defined(CONFIG_ARCH_T1024)
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rcw_tmp = in_be32(&gur->rcwsr[15]) - 4;
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#else
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rcw_tmp = in_be32(&gur->rcwsr[7]);
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@@ -313,7 +313,7 @@
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#define QE_NUM_OF_SNUM 28
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#define CONFIG_SYS_FSL_SFP_VER_3_0
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#elif defined(CONFIG_ARCH_T1024)
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#define CONFIG_E5500
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#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
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#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
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@@ -28,7 +28,6 @@
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defined(CONFIG_TARGET_T1042RDB) || \
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defined(CONFIG_TARGET_T1042D4RDB) || \
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defined(CONFIG_TARGET_T1042RDB_PI) || \
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defined(CONFIG_ARCH_T1023) || \
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defined(CONFIG_ARCH_T1024)
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#ifndef CONFIG_SYS_RAMBOOT
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#define CONFIG_SYS_CPC_REINIT_F
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@@ -1792,7 +1792,7 @@ typedef struct ccsr_gur {
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#define PXCKEN_MASK 0x80000000
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#define PXCK_MASK 0x00FF0000
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#define PXCK_BITS_START 16
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#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#elif defined(CONFIG_ARCH_T1024)
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff800000
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#define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT 23
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#define FSL_CORENET_RCWSR6_BOOT_LOC 0x0f800000
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@@ -2500,7 +2500,7 @@ typedef struct ccsr_gur {
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#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
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#define MAX_SERDES 4
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#if defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
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#if defined(CONFIG_ARCH_T1024)
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#define SRDS_MAX_LANES 4
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#else
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#define SRDS_MAX_LANES 8
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