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mmc/dw_mmc: Fix clock divider calculation error for bypass mode

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To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
This commit is contained in:
Chin Liang See 2014-06-10 01:26:52 -05:00 committed by Pantelis Antoniou
parent dae0f5c644
commit 6ace153d13
1 changed files with 4 additions and 1 deletions
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5
drivers/mmc/dw_mmc.c
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@ -245,7 +245,10 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
return -EINVAL;
}
div = DIV_ROUND_UP(sclk, 2 * freq);
if (sclk == freq)
div = 0; /* bypass mode */
else
div = DIV_ROUND_UP(sclk, 2 * freq);
dwmci_writel(host, DWMCI_CLKENA, 0);
dwmci_writel(host, DWMCI_CLKSRC, 0);