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mtd: stm32_fmc2: migrate trace to dev and log macro

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Change pr_* to dev_ or log_ macro and define LOG_CATEGORY.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrick Delaunay
2020-11-06 19:01:54 +01:00
committed by Patrick Delaunay
parent 162f5888e7
commit 6a7eefeb7e
1 changed files with 19 additions and 21 deletions
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40
drivers/mtd/nand/raw/stm32_fmc2_nand.c
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@@ -4,12 +4,15 @@
* Author: Christophe Kerello <christophe.kerello@st.com> * Author: Christophe Kerello <christophe.kerello@st.com>
*/ */
#define LOG_CATEGORY UCLASS_MTD
#include <common.h> #include <common.h>
#include <clk.h> #include <clk.h>
#include <dm.h> #include <dm.h>
#include <log.h> #include <log.h>
#include <nand.h> #include <nand.h>
#include <reset.h> #include <reset.h>
#include <dm/device_compat.h>
#include <linux/bitfield.h> #include <linux/bitfield.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/delay.h> #include <linux/delay.h>
@@ -324,7 +327,7 @@ static int stm32_fmc2_nfc_ham_calculate(struct mtd_info *mtd, const u8 *data,
ret = readl_poll_timeout(nfc->io_base + FMC2_SR, sr, ret = readl_poll_timeout(nfc->io_base + FMC2_SR, sr,
sr & FMC2_SR_NWRF, FMC2_TIMEOUT_5S); sr & FMC2_SR_NWRF, FMC2_TIMEOUT_5S);
if (ret < 0) { if (ret < 0) {
pr_err("Ham timeout\n"); log_err("Ham timeout\n");
return ret; return ret;
} }
@@ -409,7 +412,7 @@ static int stm32_fmc2_nfc_bch_calculate(struct mtd_info *mtd, const u8 *data,
ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr, ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_EPBRF, FMC2_TIMEOUT_5S); bchisr & FMC2_BCHISR_EPBRF, FMC2_TIMEOUT_5S);
if (ret < 0) { if (ret < 0) {
pr_err("Bch timeout\n"); log_err("Bch timeout\n");
return ret; return ret;
} }
@@ -457,7 +460,7 @@ static int stm32_fmc2_nfc_bch_correct(struct mtd_info *mtd, u8 *dat,
ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr, ret = readl_poll_timeout(nfc->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_DERF, FMC2_TIMEOUT_5S); bchisr & FMC2_BCHISR_DERF, FMC2_TIMEOUT_5S);
if (ret < 0) { if (ret < 0) {
pr_err("Bch timeout\n"); log_err("Bch timeout\n");
return ret; return ret;
} }
@@ -795,26 +798,24 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node)
nand->ncs /= sizeof(u32); nand->ncs /= sizeof(u32);
if (!nand->ncs) { if (!nand->ncs) {
pr_err("Invalid reg property size\n"); log_err("Invalid reg property size\n");
return -EINVAL; return -EINVAL;
} }
ret = ofnode_read_u32_array(node, "reg", cs, nand->ncs); ret = ofnode_read_u32_array(node, "reg", cs, nand->ncs);
if (ret < 0) { if (ret < 0) {
pr_err("Could not retrieve reg property\n"); log_err("Could not retrieve reg property\n");
return -EINVAL; return -EINVAL;
} }
for (i = 0; i < nand->ncs; i++) { for (i = 0; i < nand->ncs; i++) {
if (cs[i] >= FMC2_MAX_CE) { if (cs[i] >= FMC2_MAX_CE) {
pr_err("Invalid reg value: %d\n", log_err("Invalid reg value: %d\n", nand->cs_used[i]);
nand->cs_used[i]);
return -EINVAL; return -EINVAL;
} }
if (nfc->cs_assigned & BIT(cs[i])) { if (nfc->cs_assigned & BIT(cs[i])) {
pr_err("Cs already assigned: %d\n", log_err("Cs already assigned: %d\n", nand->cs_used[i]);
nand->cs_used[i]);
return -EINVAL; return -EINVAL;
} }
@@ -837,12 +838,12 @@ static int stm32_fmc2_nfc_parse_dt(struct udevice *dev,
nchips++; nchips++;
if (!nchips) { if (!nchips) {
pr_err("NAND chip not defined\n"); log_err("NAND chip not defined\n");
return -EINVAL; return -EINVAL;
} }
if (nchips > 1) { if (nchips > 1) {
pr_err("Too many NAND chips defined\n"); log_err("Too many NAND chips defined\n");
return -EINVAL; return -EINVAL;
} }
@@ -918,24 +919,21 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
addr = dev_read_addr_index(dev, mem_region); addr = dev_read_addr_index(dev, mem_region);
if (addr == FDT_ADDR_T_NONE) { if (addr == FDT_ADDR_T_NONE) {
pr_err("Resource data_base not found for cs%d", dev_err(dev, "Resource data_base not found for cs%d", chip_cs);
chip_cs);
return ret; return ret;
} }
nfc->data_base[chip_cs] = addr; nfc->data_base[chip_cs] = addr;
addr = dev_read_addr_index(dev, mem_region + 1); addr = dev_read_addr_index(dev, mem_region + 1);
if (addr == FDT_ADDR_T_NONE) { if (addr == FDT_ADDR_T_NONE) {
pr_err("Resource cmd_base not found for cs%d", dev_err(dev, "Resource cmd_base not found for cs%d", chip_cs);
chip_cs);
return ret; return ret;
} }
nfc->cmd_base[chip_cs] = addr; nfc->cmd_base[chip_cs] = addr;
addr = dev_read_addr_index(dev, mem_region + 2); addr = dev_read_addr_index(dev, mem_region + 2);
if (addr == FDT_ADDR_T_NONE) { if (addr == FDT_ADDR_T_NONE) {
pr_err("Resource addr_base not found for cs%d", dev_err(dev, "Resource addr_base not found for cs%d", chip_cs);
chip_cs);
return ret; return ret;
} }
nfc->addr_base[chip_cs] = addr; nfc->addr_base[chip_cs] = addr;
@@ -985,14 +983,14 @@ static int stm32_fmc2_nfc_probe(struct udevice *dev)
* ECC sector size = 512 * ECC sector size = 512
*/ */
if (chip->ecc.mode != NAND_ECC_HW) { if (chip->ecc.mode != NAND_ECC_HW) {
pr_err("Nand_ecc_mode is not well defined in the DT\n"); dev_err(dev, "Nand_ecc_mode is not well defined in the DT\n");
return -EINVAL; return -EINVAL;
} }
ret = nand_check_ecc_caps(chip, &stm32_fmc2_nfc_ecc_caps, ret = nand_check_ecc_caps(chip, &stm32_fmc2_nfc_ecc_caps,
mtd->oobsize - FMC2_BBM_LEN); mtd->oobsize - FMC2_BBM_LEN);
if (ret) { if (ret) {
pr_err("No valid ECC settings set\n"); dev_err(dev, "No valid ECC settings set\n");
return ret; return ret;
} }
@@ -1045,6 +1043,6 @@ void board_nand_init(void)
DM_DRIVER_GET(stm32_fmc2_nfc), DM_DRIVER_GET(stm32_fmc2_nfc),
&dev); &dev);
if (ret && ret != -ENODEV) if (ret && ret != -ENODEV)
pr_err("Failed to initialize STM32 FMC2 NFC controller. (error %d)\n", log_err("Failed to initialize STM32 FMC2 NFC controller. (error %d)\n",
ret); ret);
} }