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fpga: xilinx: virtex2: Setup NULL fpga_op without driver

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Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2014-07-16 10:48:08 +02:00
parent a99a06cbbd
commit 6a6acd12ad
1 changed files with 31 additions and 14 deletions
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45
include/virtex2.h
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@ -11,8 +11,6 @@
#include <xilinx.h> #include <xilinx.h>
extern struct xilinx_fpga_op virtex2_op;
/* /*
* Slave SelectMap Implementation function table. * Slave SelectMap Implementation function table.
*/ */
@ -40,6 +38,13 @@ typedef struct {
xilinx_wdata_fn wdata; xilinx_wdata_fn wdata;
} xilinx_virtex2_slave_serial_fns; } xilinx_virtex2_slave_serial_fns;
#if defined(CONFIG_FPGA_VIRTEX2)
extern struct xilinx_fpga_op virtex2_op;
# define FPGA_VIRTEX2_OPS &virtex2_op
#else
# define FPGA_VIRTEX2_OPS NULL
#endif
/* Device Image Sizes (in bytes) /* Device Image Sizes (in bytes)
*********************************************************************/ *********************************************************************/
#define XILINX_XC2V40_SIZE (338208 / 8) #define XILINX_XC2V40_SIZE (338208 / 8)
@ -58,39 +63,51 @@ typedef struct {
/* Descriptor Macros /* Descriptor Macros
*********************************************************************/ *********************************************************************/
#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op } { xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
FPGA_VIRTEX2_OPS }
#endif /* _VIRTEX2_H_ */ #endif /* _VIRTEX2_H_ */