i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACY

It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and
CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less
than a year away.

Also we want to have a CONFIG_I2C for U-Boot proper just like we have
CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules.

Rename this symbol so it is clear it is going away.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Simon Glass 2021-07-10 21:14:32 -06:00 committed by Tom Rini
parent 9ca00684db
commit 69d9eda4da
110 changed files with 133 additions and 130 deletions

7
README
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@ -1461,9 +1461,12 @@ The following options need to be configured:
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity. with a list of GPIO LEDs that have inverted polarity.
- I2C Support: CONFIG_SYS_I2C - I2C Support: CONFIG_SYS_I2C_LEGACY
This enable the NEW i2c subsystem, and will allow you to use Note: This is deprecated in favour of driver model. Use
CONFIG_DM_I2C instead.
This enable the legacy i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set i2c commands at the u-boot command line (as long as you set
CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
for defining speed and slave address for defining speed and slave address

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@ -329,7 +329,7 @@ static void erratum_rcw_src(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203 #ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void) static void erratum_a009203(void)
{ {
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
u8 __iomem *ptr; u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR #ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG); ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);

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@ -88,7 +88,7 @@ void board_init_f(ulong dummy)
preloader_console_init(); preloader_console_init();
spl_set_bd(); spl_set_bd();
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
#ifdef CONFIG_SPL_I2C_SUPPORT #ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init_all(); i2c_init_all();
#endif #endif

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@ -184,7 +184,7 @@
#define TZPC_BASE 0x02200000 #define TZPC_BASE 0x02200000
#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804) #define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EARLY_INIT #define CONFIG_SYS_I2C_EARLY_INIT
#endif #endif
#define SRDS_MAX_LANES 8 #define SRDS_MAX_LANES 8

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@ -96,7 +96,7 @@
*/ */
#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C) #if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
#ifndef CONFIG_SYS_I2C_SOFT #ifndef CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#endif #endif
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -106,7 +106,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
env_relocate(); env_relocate();
#endif #endif
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all(); i2c_init_all();
#else #else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);

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@ -5,6 +5,6 @@
# Author: Igor Grinberg <grinberg@compulab.co.il> # Author: Igor Grinberg <grinberg@compulab.co.il>
obj-y += common.o obj-y += common.o
obj-$(CONFIG_SYS_I2C) += eeprom.o obj-$(CONFIG_SYS_I2C_LEGACY) += eeprom.o
obj-$(CONFIG_LCD) += omap3_display.o obj-$(CONFIG_LCD) += omap3_display.o
obj-$(CONFIG_SMC911X) += omap3_smc911x.o obj-$(CONFIG_SMC911X) += omap3_smc911x.o

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@ -10,7 +10,7 @@
#define _EEPROM_ #define _EEPROM_
#include <errno.h> #include <errno.h>
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
u32 cl_eeprom_get_board_rev(uint eeprom_bus); u32 cl_eeprom_get_board_rev(uint eeprom_bus);
int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);

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@ -99,7 +99,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
env_relocate(); env_relocate();
#endif #endif
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all(); i2c_init_all();
#else #else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);

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@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void) int board_early_init_f(void)
{ {
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) #if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */ /* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif #endif

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@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void) int board_early_init_f(void)
{ {
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) #if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */ /* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif #endif
@ -78,7 +78,7 @@ int board_init(void)
void reset_cpu(void) void reset_cpu(void)
{ {
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) #if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80); i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
#else #else
/* only CA57 ? */ /* only CA57 ? */

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@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void) int board_early_init_f(void)
{ {
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) #if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */ /* DVFS for reset */
mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif #endif

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@ -104,7 +104,7 @@ int board_init(void)
/* Address of boot parameters */ /* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
#endif #endif

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@ -171,7 +171,7 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
#endif #endif
#endif #endif
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
static struct i2c_pads_info tqma6_i2c3_pads = { static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */ /* I2C3: on board LM75, M24C64, */
.scl = { .scl = {
@ -216,7 +216,7 @@ int board_init(void)
#ifndef CONFIG_DM_SPI #ifndef CONFIG_DM_SPI
tqma6_iomuxc_spi(); tqma6_iomuxc_spi();
#endif #endif
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
tqma6_setup_i2c(); tqma6_setup_i2c();
#endif #endif

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@ -46,7 +46,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
printf("Cannot find RTC: err=%d\n", rcode); printf("Cannot find RTC: err=%d\n", rcode);
return CMD_RET_FAILURE; return CMD_RET_FAILURE;
} }
#elif defined(CONFIG_SYS_I2C) #elif defined(CONFIG_SYS_I2C_LEGACY)
old_bus = i2c_get_bus_num(); old_bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM); i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
#else #else
@ -119,7 +119,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
} }
/* switch back to original I2C bus */ /* switch back to original I2C bus */
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
i2c_set_bus_num(old_bus); i2c_set_bus_num(old_bus);
#elif !defined(CONFIG_DM_RTC) #elif !defined(CONFIG_DM_RTC)
I2C_SET_BUS(old_bus); I2C_SET_BUS(old_bus);

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@ -75,7 +75,7 @@ void eeprom_init(int bus)
/* I2C EEPROM */ /* I2C EEPROM */
#if CONFIG_IS_ENABLED(DM_I2C) #if CONFIG_IS_ENABLED(DM_I2C)
eeprom_i2c_bus = bus; eeprom_i2c_bus = bus;
#elif defined(CONFIG_SYS_I2C) #elif defined(CONFIG_SYS_I2C_LEGACY)
if (bus >= 0) if (bus >= 0)
i2c_set_bus_num(bus); i2c_set_bus_num(bus);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);

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@ -98,7 +98,7 @@ static uint i2c_mm_last_alen;
* pairs. The following macros take care of this */ * pairs. The following macros take care of this */
#if defined(CONFIG_SYS_I2C_NOPROBES) #if defined(CONFIG_SYS_I2C_NOPROBES)
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) #if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
static struct static struct
{ {
uchar bus; uchar bus;
@ -114,7 +114,7 @@ static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
#define NO_PROBE_ADDR(i) i2c_no_probes[(i)] #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
#endif /* defined(CONFIG_SYS_I2C) */ #endif /* defined(CONFIG_SYS_I2C_LEGACY) */
#endif #endif
#define DISP_LINE_LEN 16 #define DISP_LINE_LEN 16
@ -209,7 +209,7 @@ void i2c_init_board(void)
* *
* Returns I2C bus speed in Hz. * Returns I2C bus speed in Hz.
*/ */
#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C) #if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
/* /*
* TODO: Implement architecture-specific get/set functions * TODO: Implement architecture-specific get/set functions
* Should go away, if we switched completely to new multibus support * Should go away, if we switched completely to new multibus support
@ -1725,7 +1725,7 @@ static void show_bus(struct udevice *bus)
* *
* Returns zero always. * Returns zero always.
*/ */
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C) #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]) char *const argv[])
{ {
@ -1811,7 +1811,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
* Returns zero on success, CMD_RET_USAGE in case of misuse and negative * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
* on error. * on error.
*/ */
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ #if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
CONFIG_IS_ENABLED(DM_I2C) CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc, static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]) char *const argv[])
@ -1834,7 +1834,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
printf("Current bus is %d\n", bus_no); printf("Current bus is %d\n", bus_no);
} else { } else {
bus_no = simple_strtoul(argv[1], NULL, 10); bus_no = simple_strtoul(argv[1], NULL, 10);
#if defined(CONFIG_SYS_I2C) #if defined(CONFIG_SYS_I2C_LEGACY)
if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
printf("Invalid bus %d\n", bus_no); printf("Invalid bus %d\n", bus_no);
return -1; return -1;
@ -1852,7 +1852,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
return ret ? CMD_RET_FAILURE : 0; return ret ? CMD_RET_FAILURE : 0;
} }
#endif /* defined(CONFIG_SYS_I2C) */ #endif /* defined(CONFIG_SYS_I2C_LEGACY) */
/** /**
* do_i2c_bus_speed() - Handle the "i2c speed" command-line command * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
@ -1951,7 +1951,7 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
printf("Error: Not supported by the driver\n"); printf("Error: Not supported by the driver\n");
return CMD_RET_FAILURE; return CMD_RET_FAILURE;
} }
#elif defined(CONFIG_SYS_I2C) #elif defined(CONFIG_SYS_I2C_LEGACY)
i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
#else #else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
@ -1960,11 +1960,11 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
} }
static struct cmd_tbl cmd_i2c_sub[] = { static struct cmd_tbl cmd_i2c_sub[] = {
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C) #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif #endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
#if defined(CONFIG_SYS_I2C) || \ #if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C) defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */ #endif /* CONFIG_I2C_MULTI_BUS */
@ -2036,12 +2036,12 @@ static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
/***************************************************/ /***************************************************/
#ifdef CONFIG_SYS_LONGHELP #ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] = static char i2c_help_text[] =
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C) #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
"i2c " /* That's the prefix for the crc32 command below. */ "i2c " /* That's the prefix for the crc32 command below. */
#endif #endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
#if defined(CONFIG_SYS_I2C) || \ #if defined(CONFIG_SYS_I2C_LEGACY) || \
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C) defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n" "i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */ #endif /* CONFIG_I2C_MULTI_BUS */

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@ -244,7 +244,7 @@ __weak int dram_init_banksize(void)
return 0; return 0;
} }
#if defined(CONFIG_SYS_I2C) #if defined(CONFIG_SYS_I2C_LEGACY)
static int init_func_i2c(void) static int init_func_i2c(void)
{ {
puts("I2C: "); puts("I2C: ");
@ -871,7 +871,7 @@ static const init_fnc_t init_sequence_f[] = {
misc_init_f, misc_init_f,
#endif #endif
INIT_FUNC_WATCHDOG_RESET INIT_FUNC_WATCHDOG_RESET
#if defined(CONFIG_SYS_I2C) #if defined(CONFIG_SYS_I2C_LEGACY)
init_func_i2c, init_func_i2c,
#endif #endif
#if defined(CONFIG_VID) && !defined(CONFIG_SPL) #if defined(CONFIG_VID) && !defined(CONFIG_SPL)

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@ -336,7 +336,7 @@ int stdio_add_devices(void)
dev->name); dev->name);
} }
} }
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
i2c_init_all(); i2c_init_all();
#endif #endif
if (IS_ENABLED(CONFIG_DM_VIDEO)) { if (IS_ENABLED(CONFIG_DM_VIDEO)) {

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@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o obj-$(CONFIG_I2C_MV) += mv_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o

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@ -277,7 +277,7 @@ struct global_data {
*/ */
void *trace_buff; void *trace_buff;
#endif #endif
#if defined(CONFIG_SYS_I2C) #if defined(CONFIG_SYS_I2C_LEGACY)
/** /**
* @cur_i2c_bus: currently used I2C bus * @cur_i2c_bus: currently used I2C bus
*/ */

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@ -47,8 +47,8 @@
#endif #endif
#if CONFIG_IS_ENABLED(DM_I2C) #if CONFIG_IS_ENABLED(DM_I2C)
# ifdef CONFIG_SYS_I2C # ifdef CONFIG_SYS_I2C_LEGACY
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used" # error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
# endif # endif
#endif #endif

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@ -40,7 +40,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -49,7 +49,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_i2C_FSL #define CONFIG_SYS_i2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -70,7 +70,7 @@
#define CONFIG_HOSTNAME "M5253DEMO" #define CONFIG_HOSTNAME "M5253DEMO"
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -59,7 +59,7 @@
#endif #endif
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -55,7 +55,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -49,7 +49,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -51,7 +51,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -165,7 +165,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -220,7 +220,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -203,7 +203,7 @@
#define CONFIG_FSL_SERDES2 0xe3100 #define CONFIG_FSL_SERDES2 0xe3100
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -206,7 +206,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -295,7 +295,7 @@ extern unsigned long get_clock_freq(void);
* I2C * I2C
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000

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@ -203,7 +203,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -526,7 +526,7 @@ extern unsigned long get_sdram_size(void);
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000

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@ -260,7 +260,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000

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@ -423,7 +423,7 @@ unsigned long get_board_ddr_clk(void);
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */

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@ -453,7 +453,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C3_SPEED 400000 #define CONFIG_SYS_FSL_I2C3_SPEED 400000

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@ -371,7 +371,7 @@ unsigned long get_board_ddr_clk(void);
* I2C * I2C
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F

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@ -323,7 +323,7 @@ unsigned long get_board_ddr_clk(void);
* I2C * I2C
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F

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@ -155,7 +155,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F

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@ -310,7 +310,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -58,7 +58,7 @@
#define CONFIG_MCFTMR #define CONFIG_MCFTMR
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000 #define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -20,7 +20,7 @@
#define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_SYS_NS16550_COM1 0x44e09000
#define CONFIG_I2C #define CONFIG_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif /* CONFIG_DM */ #endif /* CONFIG_DM */

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@ -31,7 +31,7 @@
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
/* I2C configs */ /* I2C configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000

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@ -166,7 +166,7 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -41,7 +41,7 @@
*/ */
/* I2C support */ /* I2C support */
#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_PXA #define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C #define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C #define CONFIG_PXA_PWR_I2C

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@ -270,7 +270,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000

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@ -18,7 +18,7 @@
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -13,7 +13,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -19,7 +19,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -40,7 +40,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* /*

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@ -21,7 +21,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -194,7 +194,7 @@
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300

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@ -153,7 +153,7 @@
* I2C related stuff * I2C related stuff
*/ */
#ifdef CONFIG_CMD_I2C #ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

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@ -26,7 +26,7 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C config */ /* I2C config */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -21,7 +21,7 @@
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -97,7 +97,7 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_MAX_I2C_BUS 1 #define CONFIG_SYS_MAX_I2C_BUS 1
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0 #define CONFIG_SYS_I2C_SOFT_SLAVE 0

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@ -36,7 +36,7 @@
/* /*
* Hardware drivers * Hardware drivers
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -42,7 +42,7 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -163,7 +163,7 @@
/* /*
* I2C setup * I2C setup
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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@ -37,7 +37,7 @@
#define CONFIG_POWER_I2C #define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450 #define CONFIG_POWER_PCA9450
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif

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@ -44,7 +44,7 @@
#undef CONFIG_DM_PMIC #undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100 #undef CONFIG_DM_PMIC_PFUZE100
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */

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@ -41,7 +41,7 @@
#undef CONFIG_DM_PMIC #undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100 #undef CONFIG_DM_PMIC_PFUZE100
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */

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@ -62,7 +62,7 @@
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_NUM_I2C_BUSES 4 #define CONFIG_SYS_NUM_I2C_BUSES 4
#define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL

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@ -90,7 +90,7 @@
* I2C related stuff * I2C related stuff
*/ */
#undef CONFIG_I2C_MVTWSI #undef CONFIG_I2C_MVTWSI
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_SYS_I2C_INIT_BOARD

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@ -191,7 +191,7 @@
/* /*
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000

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@ -83,7 +83,7 @@
#define CONFIG_NFS_TIMEOUT 10000UL #define CONFIG_NFS_TIMEOUT 10000UL
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SH #define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000

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@ -47,7 +47,7 @@
/* /*
* I2C Configuration * I2C Configuration
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000 #define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */

View File

@ -56,7 +56,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#else #else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0

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@ -99,7 +99,7 @@
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#else #else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0

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@ -331,7 +331,7 @@ unsigned long get_board_ddr_clk(void);
* I2C * I2C
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#else #else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0

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@ -105,7 +105,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#else #else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0

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@ -209,7 +209,7 @@
* I2C * I2C
*/ */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#else #else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM #define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 #define CONFIG_I2C_DEFAULT_BUS_NUMBER 0

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@ -45,7 +45,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif
/* Serial Port */ /* Serial Port */

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@ -150,7 +150,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */

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@ -134,7 +134,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */

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@ -62,7 +62,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif

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@ -75,7 +75,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif
/* Serial Port */ /* Serial Port */

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@ -88,7 +88,7 @@
* I2C * I2C
*/ */
#ifdef CONFIG_CMD_I2C #ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -18,7 +18,7 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0 #define CONFIG_SYS_I2C_SLAVE 0x0

View File

@ -36,7 +36,7 @@
#define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_MXC_USB_FLAGS 0
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -51,7 +51,7 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

View File

@ -38,7 +38,7 @@
#endif #endif
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

View File

@ -21,7 +21,7 @@
#define CONFIG_MXC_UART_BASE UART2_BASE #define CONFIG_MXC_UART_BASE UART2_BASE
/* I2C Configs */ /* I2C Configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

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@ -52,7 +52,7 @@
#endif #endif
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

View File

@ -464,7 +464,7 @@
/* I2C */ /* I2C */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000

View File

@ -33,7 +33,7 @@
#define CONFIG_POWER_I2C #define CONFIG_POWER_I2C
#define CONFIG_POWER_PCA9450 #define CONFIG_POWER_PCA9450
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif

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@ -126,7 +126,7 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* I2C configs */ /* I2C configs */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 #define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_MXC_I2C2 #define CONFIG_SYS_I2C_MXC_I2C2

View File

@ -40,7 +40,7 @@
#undef CONFIG_DM_MMC #undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC #undef CONFIG_DM_PMIC
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */

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@ -74,7 +74,7 @@
/* I2C Configuration */ /* I2C Configuration */
#define CONFIG_I2C #define CONFIG_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
/* Defines for SPL */ /* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \

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@ -73,7 +73,7 @@
#endif #endif
/* I2C - Bit-bashed */ /* I2C - Bit-bashed */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 100000 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F

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@ -53,7 +53,7 @@
* I2C * I2C
*/ */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_I2C_MULTI_BUS #define CONFIG_I2C_MULTI_BUS
/* /*

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@ -199,7 +199,7 @@
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f #define CONFIG_SYS_I2C_SLAVE 0x7f
#endif #endif

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@ -116,7 +116,7 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000

View File

@ -56,7 +56,7 @@
/* EHCI */ /* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07

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@ -24,7 +24,7 @@
*/ */
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE #define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE

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@ -89,7 +89,7 @@
/* If DM_I2C, enable non-DM I2C support */ /* If DM_I2C, enable non-DM I2C support */
#if !CONFIG_IS_ENABLED(DM_I2C) #if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_I2C #define CONFIG_I2C
#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_LEGACY
#endif #endif
/* /*

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@ -118,7 +118,7 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C #undef CONFIG_SYS_I2C_LEGACY
#endif #endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */ #endif /* __CONFIG_TI_OMAP4_COMMON_H */

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