Convert CONFIG_SYS_BARGSIZE to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_BARGSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-05-12 10:02:06 -04:00
parent d31466b382
commit 6889412ad5
87 changed files with 21 additions and 172 deletions

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@ -228,6 +228,14 @@ config SYS_BOOT_GET_CMDLINE
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BARGSIZE
int "Size of kernel command line buffer in bytes"
depends on SYS_BOOT_GET_CMDLINE
default 512
help
Buffer size for Boot Arguments which are passed to the application
(usually a Linux kernel) when it is booted
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help

4
README
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@ -1853,10 +1853,6 @@ Configuration Settings:
- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
prompt for user input.
- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
the application (usually a Linux kernel) when it is
booted
- CONFIG_SYS_BAUDRATE_TABLE:
List of legal baudrate settings for this board.

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@ -21,10 +21,6 @@
#include <asm/cache.h>
#include <asm/global_data.h>
#ifndef CONFIG_SYS_BARGSIZE
#define CONFIG_SYS_BARGSIZE 512
#endif
DECLARE_GLOBAL_DATA_PTR;
#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
@ -827,6 +823,7 @@ int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images,
return 0;
}
#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
/**
* boot_get_cmdline - allocate and initialize kernel cmdline
* @lmb: pointer to lmb handle, will be used for memory mgmt
@ -900,6 +897,7 @@ int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd)
return 0;
}
#endif
int image_setup_linux(bootm_headers_t *images)
{

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@ -7,6 +7,7 @@ CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFF040000
CONFIG_TARGET_EB_CPU5282=y
CONFIG_MCFTMR=y
CONFIG_SYS_BARGSIZE=1024
CONFIG_SYS_MONITOR_BASE=0xFF000400
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y

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@ -7,6 +7,7 @@ CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFF040000
CONFIG_TARGET_EB_CPU5282=y
CONFIG_MCFTMR=y
CONFIG_SYS_BARGSIZE=1024
CONFIG_SYS_MONITOR_BASE=0xF0000418
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y

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@ -112,6 +112,7 @@ CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y
CONFIG_CMD_IOLOOP=y
CONFIG_SYS_MEMTEST_START=0x00001000
CONFIG_SYS_MEMTEST_END=0x07e00000
CONFIG_SYS_BARGSIZE=1024
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y

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@ -119,6 +119,7 @@ CONFIG_ACR_PIPE_DEP_4=y
CONFIG_ACR_RPTCNT_4=y
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
CONFIG_SYS_BARGSIZE=1024
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y

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@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stmark2"
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_TARGET_STMARK2=y
CONFIG_MCFTMR=y
CONFIG_SYS_BARGSIZE=256
CONFIG_TIMESTAMP=y
CONFIG_SYS_MONITOR_BASE=0x47E00400
CONFIG_USE_BOOTARGS=y

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@ -86,9 +86,6 @@
/* Miscellaneous configurable options */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
/* Physical Memory Map */

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@ -73,6 +73,4 @@
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __APALIS_IMX8_H */

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@ -89,10 +89,6 @@
"source ${loadaddr}\0" \
"vidargs=fbcon=map:1\0"
/* Increase arguments buffer size */
#undef CONFIG_SYS_BARGSIZE
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -26,10 +26,6 @@
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
/* Increase arguments buffer size */
#undef CONFIG_SYS_BARGSIZE
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define UBOOT_UPDATE \
"uboot_hwpart=1\0" \
"uboot_blk=0\0" \

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@ -30,11 +30,6 @@
* Miscellaneous configurable options
*/
/*
* Boot Argument Buffer Size
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* DT blob (fdt) address */
#define CONFIG_SYS_FDT_BASE 0x800f0000

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@ -29,8 +29,6 @@
/* console configuration */
#define CONFIG_SYS_NS16550_CLK 25000000
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* Increase max uncompressed/gunzip size, keeping size same as EMMC linux
* partition.

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@ -117,9 +117,6 @@
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
/* Console buffer and boot args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define BOOTAUX_RESERVED_MEM_BASE 0x88000000
#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */

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@ -28,9 +28,6 @@
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
/* Miscellaneous configuration options */
#define CONFIG_SYS_BOOTM_LEN (64 << 20)

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@ -106,8 +106,6 @@
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Generic Timer Definitions */
#define BOOTAUX_RESERVED_MEM_BASE 0x88000000

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@ -28,10 +28,6 @@
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
UBOOT_UPDATE
/* Increase arguments buffer size */
#undef CONFIG_SYS_BARGSIZE
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -24,10 +24,6 @@
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Increase arguments buffer size */
#undef CONFIG_SYS_BARGSIZE
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define UBOOT_UPDATE \
"uboot_hwpart=1\0" \
"uboot_blk=0\0" \

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@ -82,7 +82,6 @@
"video-mode=dcufb:640x480-16@60,monitor=lcd\0"
/* Miscellaneous configurable options */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Physical memory map */
#define PHYS_SDRAM (0x80000000)

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@ -148,7 +148,6 @@
/*
* U-Boot general configuration
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
/*
* Linux Information

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@ -64,7 +64,6 @@
/*
* U-Boot General Configurations
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* Pass open firmware flat tree

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@ -111,8 +111,6 @@
"fi; " \
"else run nandboot; fi\0"
/* Boot Argument Buffer Size */
/* Defines for SPL */
/* NAND boot config */

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@ -285,8 +285,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_STANDALONE_LOAD_ADDR 0x10001000
/* Physical Memory Map */

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@ -29,8 +29,6 @@
* Environment is in the second sector of the first 256k of flash *
*----------------------------------------------------------------------*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*#define CONFIG_SYS_DRAM_TEST 1 */
#undef CONFIG_SYS_DRAM_TEST

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@ -10,8 +10,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_STACK_SIZE (32 * 1024)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)

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@ -27,7 +27,4 @@
/* Miscellaneous configurable options */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __CONFIG_H */

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@ -17,9 +17,6 @@
/* Miscellaneous configurable options */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* select serial console configuration */
/* IRAM Layout */

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@ -20,9 +20,6 @@
/* Miscellaneous configurable options */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CPU_RELEASE_ADDR secondary_boot_addr
#define CONFIG_SYS_BAUDRATE_TABLE \

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@ -58,8 +58,6 @@
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* For booting Linux, the board info and command line data
* have to be in the first 256 MB of memory, since this is

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@ -19,7 +19,6 @@
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_64BIT_LBA

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@ -216,7 +216,6 @@
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_LOADS_ECHO
#undef CONFIG_SYS_LOADS_BAUD_CHANGE

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@ -106,9 +106,6 @@
/*
* U-Boot general configuration
*/
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \

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@ -147,8 +147,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
#define CONFIG_SYS_FSL_USDHC_NUM 2

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@ -93,5 +93,4 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif

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@ -43,8 +43,6 @@
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* PHY needs a longer autonegotiation timeout after reset */
#define PHY_ANEG_TIMEOUT 20000

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@ -70,8 +70,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_FEC_MXC_PHYADDR 0
#endif

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@ -68,8 +68,6 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -104,6 +104,8 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* FEC */
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#endif

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@ -109,5 +109,4 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif

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@ -47,8 +47,6 @@
#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* I2C */
#endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */

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@ -77,6 +77,4 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif

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@ -66,8 +66,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -100,6 +100,8 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* FEC */
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#endif

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@ -41,9 +41,6 @@
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* PHY needs a longer autonegotiation timeout after reset */
#define PHY_ANEG_TIMEOUT 20000
#define FEC_QUIRK_ENET_MAC

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@ -81,6 +81,4 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif

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@ -170,8 +170,6 @@
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -100,8 +100,6 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* FEC */
#define FEC_QUIRK_ENET_MAC

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@ -73,8 +73,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -79,8 +79,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -107,8 +107,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -128,6 +128,5 @@
#endif
/* Misc configuration */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __IMX8QXP_MEK_H */

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@ -70,8 +70,6 @@
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Using ULP WDOG for reset */
#define WDOG_BASE_ADDR WDG3_RBASE
#endif

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@ -12,7 +12,6 @@
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_HUSH_INIT_VAR

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@ -50,7 +50,6 @@
/*
* U-Boot general configuration
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
/*
* Linux Information

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@ -176,8 +176,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_SYS_INIT_SP_OFFSET \

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@ -58,8 +58,6 @@
"run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
"env exists secureboot && esbc_halt;"
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#define OCRAM_NONSECURE_SIZE 0x00010000

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@ -148,8 +148,6 @@ unsigned long long get_qixis_addr(void);
" 0x580e00000 \0"
#endif
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#ifdef CONFIG_SPL
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000

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@ -115,8 +115,6 @@
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* Initial environment variables */

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@ -32,8 +32,6 @@
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
/*
* Serial Driver

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@ -87,8 +87,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
/* Physical Memory Map */

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@ -78,8 +78,6 @@
*/
/* U-Boot general configuration */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
/*
* Drivers

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@ -22,8 +22,6 @@
"ethrotate=yes\0" \
"autoload=0\0"
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
#if defined(CONFIG_MMC_OCTEONTX)

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@ -53,8 +53,6 @@
# define CONFIG_SYS_64BIT_LBA
#endif
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
/** EMMC specific defines */

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@ -139,7 +139,6 @@
/*
* U-Boot general configuration
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
/*
* USB Configs

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@ -23,6 +23,5 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
/* Console configuration */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif

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@ -86,6 +86,4 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __PHYCORE_IMX8MM_H */

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@ -86,6 +86,4 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __PHYCORE_IMX8MP_H */

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@ -86,8 +86,6 @@
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@ -42,7 +42,6 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define KSEG1_ATU_XLAT(x) (x)

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@ -24,7 +24,6 @@
#define GICC_BASE 0xF1020000
/* console */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 }
/* PHY needs a longer autoneg timeout */

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@ -77,9 +77,6 @@
*/
/* board_init_f->init_sequence, call arch_cpu_init */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*-----------------------------------------------------------------------
* serial console configuration
*/

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@ -29,9 +29,6 @@
/* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* memtest works on 8 MB in DRAM after skipping 32MB from
* start addr of ram disk

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@ -60,8 +60,6 @@
* U-Boot general configurations
*/
/* Print buffer size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
/*
* Cache

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@ -20,7 +20,6 @@
/*
* U-Boot console configurations
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)

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@ -45,9 +45,6 @@
#define CONFIG_PRAM 2048 /* 2048 KB */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MBAR 0xFC000000
/*

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@ -35,9 +35,6 @@
*/
#define CONFIG_SYS_MMC_MAX_DEVICE 4
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
#ifdef CONFIG_ARM64
#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
#else

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@ -89,9 +89,6 @@
/* As stated above, the following choices are optional. */
/* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* When we have SPI, NOR or NAND flash we expect to be making use of
* mtdparts, both for ease of use in U-Boot and for passing information

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@ -27,8 +27,6 @@
* Command
*/
/* Miscellaneous configurable options */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
/* USB, USB storage, USB ethernet */
#define CONFIG_EHCI_MMIO_BIG_ENDIAN

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@ -41,9 +41,6 @@
#define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
#if !defined(CONFIG_ARM64)
/* Time clock 1MHz */
#define CONFIG_SYS_TIMER_RATE 1000000

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@ -86,8 +86,6 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* ENET */
#define CONFIG_FEC_MXC_PHYADDR 7

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@ -102,6 +102,4 @@
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif /* __VERDIN_IMX8MP_H */

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@ -27,7 +27,6 @@
/*
* U-Boot General Configurations
*/
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*
* NAND chip timings for FIXME: which one?

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@ -13,8 +13,6 @@
#undef CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \

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@ -28,7 +28,6 @@
/* Miscellaneous configurable options */
/* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#if defined(CONFIG_CMD_DFU)
#define DFU_DEFAULT_POLL_TIMEOUT 300

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@ -52,7 +52,6 @@
#endif
/* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)

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@ -98,9 +98,6 @@
/*==============================*/
/* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/*==============================*/
/* U-Boot autoboot configuration */
/*==============================*/