arm: dts: rockchip: update cpu and gpu nodes
In order to better compare the Linux rk3288.dtsi version with the u-boot version update the cpu and gpu nodes. Changed: use operating-points-v2 update thermal for all cpus add labels to all cpus change gpu compatible change gpu interrupt names Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Johan Jonker
Kever Yang
@@ -45,44 +45,99 @@
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x500>;
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operating-points = <
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/* KHz uV */
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1800000 1400000
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1704000 1350000
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1608000 1300000
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1512000 1250000
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1416000 1200000
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1200000 1100000
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1008000 1050000
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816000 1000000
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696000 950000
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600000 900000
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408000 900000
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216000 900000
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126000 900000
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>;
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resets = <&cru SRST_CORE0>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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resets = <&cru SRST_CORE0>;
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dynamic-power-coefficient = <370>;
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};
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cpu@501 {
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cpu1: cpu@501 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x501>;
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resets = <&cru SRST_CORE1>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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dynamic-power-coefficient = <370>;
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};
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cpu@502 {
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cpu2: cpu@502 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x502>;
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resets = <&cru SRST_CORE2>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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dynamic-power-coefficient = <370>;
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};
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cpu@503 {
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cpu3: cpu@503 {
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device_type = "cpu";
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compatible = "arm,cortex-a12";
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reg = <0x503>;
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resets = <&cru SRST_CORE3>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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dynamic-power-coefficient = <370>;
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};
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};
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cpu_opp_table: opp-table-0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-126000000 {
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opp-hz = /bits/ 64 <126000000>;
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opp-microvolt = <900000>;
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};
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opp-216000000 {
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opp-hz = /bits/ 64 <216000000>;
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opp-microvolt = <900000>;
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};
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opp-312000000 {
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opp-hz = /bits/ 64 <312000000>;
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opp-microvolt = <900000>;
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};
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opp-408000000 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <900000>;
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <900000>;
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};
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opp-696000000 {
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opp-hz = /bits/ 64 <696000000>;
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opp-microvolt = <950000>;
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};
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opp-816000000 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <1000000>;
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};
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opp-1008000000 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <1050000>;
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};
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <1100000>;
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};
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opp-1416000000 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <1200000>;
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};
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opp-1512000000 {
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opp-hz = /bits/ 64 <1512000000>;
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opp-microvolt = <1300000>;
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};
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opp-1608000000 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <1350000>;
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};
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};
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@@ -374,12 +429,18 @@
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map0 {
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trip = <&cpu_alert0>;
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cooling-device =
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<&cpu0 THERMAL_NO_LIMIT 6>;
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<&cpu0 THERMAL_NO_LIMIT 6>,
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<&cpu1 THERMAL_NO_LIMIT 6>,
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<&cpu2 THERMAL_NO_LIMIT 6>,
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<&cpu3 THERMAL_NO_LIMIT 6>;
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};
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map1 {
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trip = <&cpu_alert1>;
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cooling-device =
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<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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@@ -900,31 +961,44 @@
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};
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gpu: gpu@ffa30000 {
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compatible = "arm,malit764",
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"arm,malit76x",
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"arm,malit7xx",
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"arm,mali-midgard";
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compatible = "rockchip,rk3288-mali", "arm,mali-t760";
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reg = <0xffa30000 0x10000>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "JOB", "MMU", "GPU";
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interrupt-names = "job", "mmu", "gpu";
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clocks = <&cru ACLK_GPU>;
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clock-names = "aclk_gpu";
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operating-points = <
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/* KHz uV */
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100000 950000
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200000 950000
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300000 1000000
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400000 1100000
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/* 500000 1200000 - See crosbug.com/p/33857 */
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600000 1250000
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>;
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operating-points-v2 = <&gpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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power-domains = <&power RK3288_PD_GPU>;
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status = "disabled";
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};
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gpu_opp_table: opp-table-1 {
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compatible = "operating-points-v2";
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <950000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <950000>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <1000000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1100000>;
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <1250000>;
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};
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};
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dmac_bus_s: dma-controller@ffb20000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0xffb20000 0x4000>;
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