armv7: fsl: remove sata support

Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h

@@ -389,33 +389,6 @@ struct ccsr_serdes {
 	u8	res_a00[0x1000-0xa00];	/* from 0xa00 to 0xfff */
 };
 
-
-
-/* AHCI (sata) register map */
-struct ccsr_ahci {
-	u32 res1[0xa4/4];	/* 0x0 - 0xa4 */
-	u32 pcfg;	/* port config */
-	u32 ppcfg;	/* port phy1 config */
-	u32 pp2c;	/* port phy2 config */
-	u32 pp3c;	/* port phy3 config */
-	u32 pp4c;	/* port phy4 config */
-	u32 pp5c;	/* port phy5 config */
-	u32 paxic;	/* port AXI config */
-	u32 axicc;	/* AXI cache control */
-	u32 axipc;	/* AXI PROT control */
-	u32 ptc;	/* port Trans Config */
-	u32 pts;	/* port Trans Status */
-	u32 plc;	/* port link config */
-	u32 plc1;	/* port link config1 */
-	u32 plc2;	/* port link config2 */
-	u32 pls;	/* port link status */
-	u32 pls1;	/* port link status1 */
-	u32 pcmdc;	/* port CMD config */
-	u32 ppcs;	/* port phy control status */
-	u32 pberr;	/* port 0/1 BIST error */
-	u32 cmds;	/* port 0/1 CMD status error */
-};
-
 #define RCPM_POWMGTCSR			0x130
 #define RCPM_POWMGTCSR_SERDES_PW	0x80000000
 #define RCPM_POWMGTCSR_LPM20_REQ	0x00100000

arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h

@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2015 Freescale Semiconductor, Inc.
- */
-
-#ifndef __FSL_SATA_H_
-#define __FSL_SATA_H_
-
-int ls1021a_sata_init(void);
-#endif