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sh: tmu: Fix SH4 TCNT0 offset

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Fix the offset of TCNT0 register, which is 0xc on SH4.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut
2019-08-31 17:33:06 +02:00
committed by Marek Vasut
parent d7677bfc04
commit 6756762024
1 changed files with 1 additions and 1 deletions
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2
arch/sh/include/asm/config.h
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@@ -10,7 +10,7 @@
/* Timer */ /* Timer */
#define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */ #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) #define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
#endif #endif