From 69b3d4e930ef871df5cc10f03dd5d4e24a02c103 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 11 May 2018 18:49:14 +0900 Subject: [PATCH 1/6] ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node Add syscon-phy-mode property specifying a phandle of system controller to each ethernet node. Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 1 + arch/arm/dts/uniphier-ld20.dtsi | 1 + arch/arm/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/dts/uniphier-pxs2.dtsi | 1 + arch/arm/dts/uniphier-pxs3.dtsi | 2 ++ 5 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index bf3118eca3..6247281890 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -557,6 +557,7 @@ resets = <&sys_rst 6>; phy-mode = "rmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index b993df8a34..b25232dd20 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -626,6 +626,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 25c4b4f8fc..041e451f7b 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -342,7 +342,7 @@ has-transaction-translator; }; - soc-glue@5f800000 { + soc_glue: soc-glue@5f800000 { compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -431,6 +431,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 9760f79e7c..5cef1630b5 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -549,6 +549,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index d4c458a211..6158bd2f4c 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -434,6 +434,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio0: mdio { #address-cells = <1>; @@ -452,6 +453,7 @@ resets = <&sys_rst 7>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 1>; mdio1: mdio { #address-cells = <1>; From 28cd3d292917ea24d9b03c9976770c299f8ab9d9 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 11 May 2018 18:49:15 +0900 Subject: [PATCH 2/6] ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node The GIO clock/reset, another MAC clock, and the PHY clock are required for the ethernet of Pro4 SoC. Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-pro4.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 041e451f7b..e990aed7db 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -427,8 +427,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; - clocks = <&sys_clk 6>; - resets = <&sys_rst 6>; + clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, + <&sys_clk 10>; + resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; From 3c0fa6ce1310cd1108ba6e1e78ce03814fe4c7ca Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 11 May 2018 18:49:16 +0900 Subject: [PATCH 3/6] ARM: dts: uniphier: add clock-names and reset-names to ethernet node Add clock-names and reset-names because this node recognizes multiple clocks and resets. ("ether", and so on, for each) Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 2 ++ arch/arm/dts/uniphier-ld20.dtsi | 2 ++ arch/arm/dts/uniphier-pro4.dtsi | 2 ++ arch/arm/dts/uniphier-pxs2.dtsi | 2 ++ arch/arm/dts/uniphier-pxs3.dtsi | 4 ++++ 5 files changed, 12 insertions(+) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 6247281890..bedd0e045a 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -553,7 +553,9 @@ status = "disabled"; reg = <0x65000000 0x8500>; interrupts = <0 66 4>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index b25232dd20..b36adb9ef8 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -622,7 +622,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index e990aed7db..0004863589 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -427,8 +427,10 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "gio", "ether", "ether-gb", "ether-phy"; clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, <&sys_clk 10>; + reset-names = "gio", "ether"; resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 5cef1630b5..20f3935107 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -545,7 +545,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 6158bd2f4c..7b511656b2 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -430,7 +430,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; @@ -449,7 +451,9 @@ interrupts = <0 67 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether1_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 7>; + reset-names = "ether"; resets = <&sys_rst 7>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; From f6acbf88e40ec198b85aa583771a662f726ecc0c Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 11 May 2018 18:49:17 +0900 Subject: [PATCH 4/6] ARM: dts: uniphier: change phy-mode to 'internal' for LD11 Change the phy-mode property to 'internal' that means to use a built-in PHY implemented on LD11 SoC. Signed-off-by: Kunihiko Hayashi Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index bedd0e045a..577803bd62 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -557,7 +557,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rmii"; + phy-mode = "internal"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>; From 8c09f1f4fc9866d59056b3d2b8aeb3a1a3688e27 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 17 May 2018 19:55:20 +0900 Subject: [PATCH 5/6] ARM: uniphier: rename environment variable fdt_file to fdtfile For booting Linux in the generic distro mechanism, cmd/pxe.c retrieves the FDT file name from "fdtfile" environment variable. Rename "fdt_file" to "fdtfile" for easier migration to distro boot. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_late_init.c | 4 ++-- include/configs/uniphier.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 9dff3f16a0..6a995728d4 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -38,7 +38,7 @@ static int uniphier_set_fdt_file(void) char dtb_name[256]; int buf_len = sizeof(dtb_name); - if (env_get("fdt_file")) + if (env_get("fdtfile")) return 0; /* do nothing if it is already set */ compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL); @@ -56,7 +56,7 @@ static int uniphier_set_fdt_file(void) strncat(dtb_name, ".dtb", buf_len); - return env_set("fdt_file", dtb_name); + return env_set("fdtfile", dtb_name); } int board_late_init(void) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index f710c8fe2a..b631f79df8 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -168,10 +168,10 @@ "run boot_common\0" \ "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ - "tftpboot $fdt_addr_r $fdt_file &&" \ + "tftpboot $fdt_addr_r $fdtfile &&" \ "run boot_common\0" \ "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ - "tftpboot $fdt_addr_r $fdt_file &&" \ + "tftpboot $fdt_addr_r $fdtfile &&" \ "setenv ramdisk_addr_r - &&" \ "run boot_common\0" #endif From c3d3e2a1ef7a84384ffb6ab107c6994e1656ebc6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 23 May 2018 00:30:54 +0900 Subject: [PATCH 6/6] ARM: dts: uniphier: sync with Linux 4.17-rc6 Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 2 +- arch/arm/dts/uniphier-ld20-ref.dts | 8 ++++++++ arch/arm/dts/uniphier-ld20.dtsi | 2 +- arch/arm/dts/uniphier-pxs3.dtsi | 2 +- 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 577803bd62..e7514f01fa 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -418,7 +418,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; diff --git a/arch/arm/dts/uniphier-ld20-ref.dts b/arch/arm/dts/uniphier-ld20-ref.dts index 2c1a92fafb..440c2e6a63 100644 --- a/arch/arm/dts/uniphier-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ld20-ref.dts @@ -67,3 +67,11 @@ reg = <0>; }; }; + +&pinctrl_ether_rgmii { + tx { + pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", + "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; + drive-strength = <9>; + }; +}; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index b36adb9ef8..31bc124dfc 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -523,7 +523,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 7b511656b2..ae867cbb0a 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -338,7 +338,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>;