drivers: net: keystone_net: convert driver to adopt device driver model
Adopt keystone_net driver to adopt device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
347348f9f7
commit
6599f3690c
@ -10,6 +10,8 @@
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#include <command.h>
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#include <console.h>
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#include <dm.h>
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#include <net.h>
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#include <phy.h>
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#include <errno.h>
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@ -18,10 +20,15 @@
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#include <asm/ti-common/keystone_nav.h>
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#include <asm/ti-common/keystone_net.h>
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#include <asm/ti-common/keystone_serdes.h>
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#include <asm/arch/psc_defs.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_DM_ETH
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unsigned int emac_open;
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static struct mii_dev *mdio_bus;
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static unsigned int sys_has_mdio = 1;
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#endif
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#ifdef KEYSTONE2_EMAC_GIG_ENABLE
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#define emac_gigabit_enable(x) keystone2_eth_gigabit_enable(x)
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@ -36,40 +43,74 @@ static unsigned int sys_has_mdio = 1;
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static u8 rx_buffs[RX_BUFF_NUMS * RX_BUFF_LEN] __aligned(16);
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#ifndef CONFIG_DM_ETH
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struct rx_buff_desc net_rx_buffs = {
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.buff_ptr = rx_buffs,
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.num_buffs = RX_BUFF_NUMS,
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.buff_len = RX_BUFF_LEN,
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.rx_flow = 22,
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};
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#ifndef CONFIG_SOC_K2G
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static void keystone2_net_serdes_setup(void);
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#endif
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int keystone2_eth_read_mac_addr(struct eth_device *dev)
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{
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struct eth_priv_t *eth_priv;
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u32 maca = 0;
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u32 macb = 0;
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#ifdef CONFIG_DM_ETH
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eth_priv = (struct eth_priv_t *)dev->priv;
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enum link_type {
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LINK_TYPE_MAC_TO_MAC_AUTO = 0,
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LINK_TYPE_MAC_TO_PHY_MODE = 1,
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LINK_TYPE_MAC_TO_MAC_FORCED_MODE = 2,
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LINK_TYPE_MAC_TO_FIBRE_MODE = 3,
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LINK_TYPE_MAC_TO_PHY_NO_MDIO_MODE = 4,
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LINK_TYPE_10G_MAC_TO_PHY_MODE = 10,
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LINK_TYPE_10G_MAC_TO_MAC_FORCED_MODE = 11,
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};
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/* Read the e-fuse mac address */
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if (eth_priv->slave_port == 1) {
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maca = __raw_readl(MAC_ID_BASE_ADDR);
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macb = __raw_readl(MAC_ID_BASE_ADDR + 4);
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}
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#define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \
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((mac)[2] << 16) | ((mac)[3] << 24))
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#define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8))
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dev->enetaddr[0] = (macb >> 8) & 0xff;
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dev->enetaddr[1] = (macb >> 0) & 0xff;
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dev->enetaddr[2] = (maca >> 24) & 0xff;
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dev->enetaddr[3] = (maca >> 16) & 0xff;
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dev->enetaddr[4] = (maca >> 8) & 0xff;
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dev->enetaddr[5] = (maca >> 0) & 0xff;
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#ifdef CONFIG_KSNET_NETCP_V1_0
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return 0;
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}
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#define EMAC_EMACSW_BASE_OFS 0x90800
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#define EMAC_EMACSW_PORT_BASE_OFS (EMAC_EMACSW_BASE_OFS + 0x60)
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/* CPSW Switch slave registers */
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#define CPGMACSL_REG_SA_LO 0x10
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#define CPGMACSL_REG_SA_HI 0x14
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#define DEVICE_EMACSW_BASE(base, x) ((base) + EMAC_EMACSW_PORT_BASE_OFS + \
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(x) * 0x30)
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#elif defined CONFIG_KSNET_NETCP_V1_5
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#define EMAC_EMACSW_PORT_BASE_OFS 0x222000
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/* CPSW Switch slave registers */
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#define CPGMACSL_REG_SA_LO 0x308
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#define CPGMACSL_REG_SA_HI 0x30c
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#define DEVICE_EMACSW_BASE(base, x) ((base) + EMAC_EMACSW_PORT_BASE_OFS + \
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(x) * 0x1000)
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#endif
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struct ks2_eth_priv {
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struct udevice *dev;
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struct phy_device *phydev;
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struct mii_dev *mdio_bus;
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int phy_addr;
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phy_interface_t phy_if;
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int sgmii_link_type;
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void *mdio_base;
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struct rx_buff_desc net_rx_buffs;
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struct pktdma_cfg *netcp_pktdma;
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void *hd;
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int slave_port;
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enum link_type link_type;
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bool emac_open;
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bool has_mdio;
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};
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#endif
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/* MDIO */
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@ -140,6 +181,7 @@ static int keystone2_mdio_write(struct mii_dev *bus,
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return 0;
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}
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#ifndef CONFIG_DM_ETH
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static void __attribute__((unused))
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keystone2_eth_gigabit_enable(struct eth_device *dev)
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{
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@ -163,6 +205,31 @@ static void __attribute__((unused))
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EMAC_MACCONTROL_GIGFORCE | EMAC_MACCONTROL_GIGABIT_ENABLE,
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DEVICE_EMACSL_BASE(eth_priv->slave_port - 1) + CPGMACSL_REG_CTL);
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}
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#else
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static void __attribute__((unused))
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keystone2_eth_gigabit_enable(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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u_int16_t data;
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if (priv->has_mdio) {
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data = keystone2_mdio_read(priv->mdio_bus, priv->phy_addr,
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MDIO_DEVAD_NONE, 0);
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/* speed selection MSB */
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if (!(data & (1 << 6)))
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return;
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}
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/*
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* Check if link detected is giga-bit
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* If Gigabit mode detected, enable gigbit in MAC
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*/
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writel(readl(DEVICE_EMACSL_BASE(priv->slave_port - 1) +
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CPGMACSL_REG_CTL) |
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EMAC_MACCONTROL_GIGFORCE | EMAC_MACCONTROL_GIGABIT_ENABLE,
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DEVICE_EMACSL_BASE(priv->slave_port - 1) + CPGMACSL_REG_CTL);
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}
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#endif
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#ifdef CONFIG_SOC_K2G
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int keystone_rgmii_config(struct phy_device *phy_dev)
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@ -401,6 +468,58 @@ int ethss_stop(void)
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return 0;
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}
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struct ks2_serdes ks2_serdes_sgmii_156p25mhz = {
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.clk = SERDES_CLOCK_156P25M,
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.rate = SERDES_RATE_5G,
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.rate_mode = SERDES_QUARTER_RATE,
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.intf = SERDES_PHY_SGMII,
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.loopback = 0,
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};
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#ifndef CONFIG_SOC_K2G
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static void keystone2_net_serdes_setup(void)
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{
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ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII_BASE,
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&ks2_serdes_sgmii_156p25mhz,
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CONFIG_KSNET_SERDES_LANES_PER_SGMII);
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#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
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ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII2_BASE,
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&ks2_serdes_sgmii_156p25mhz,
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CONFIG_KSNET_SERDES_LANES_PER_SGMII);
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#endif
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/* wait till setup */
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udelay(5000);
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}
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#endif
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#ifndef CONFIG_DM_ETH
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int keystone2_eth_read_mac_addr(struct eth_device *dev)
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{
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struct eth_priv_t *eth_priv;
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u32 maca = 0;
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u32 macb = 0;
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eth_priv = (struct eth_priv_t *)dev->priv;
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/* Read the e-fuse mac address */
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if (eth_priv->slave_port == 1) {
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maca = __raw_readl(MAC_ID_BASE_ADDR);
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macb = __raw_readl(MAC_ID_BASE_ADDR + 4);
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}
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dev->enetaddr[0] = (macb >> 8) & 0xff;
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dev->enetaddr[1] = (macb >> 0) & 0xff;
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dev->enetaddr[2] = (maca >> 24) & 0xff;
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dev->enetaddr[3] = (maca >> 16) & 0xff;
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dev->enetaddr[4] = (maca >> 8) & 0xff;
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dev->enetaddr[5] = (maca >> 0) & 0xff;
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return 0;
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}
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int32_t cpmac_drv_send(u32 *buffer, int num_bytes, int slave_port_num)
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{
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if (num_bytes < EMAC_MIN_ETHERNET_PKT_SIZE)
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@ -556,6 +675,7 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
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int res;
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struct eth_device *dev;
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struct phy_device *phy_dev;
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struct mdio_regs *adap_mdio = (struct mdio_regs *)EMAC_MDIO_BASE_ADDR;
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dev = malloc(sizeof(struct eth_device));
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if (dev == NULL)
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@ -612,28 +732,301 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
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return 0;
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}
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struct ks2_serdes ks2_serdes_sgmii_156p25mhz = {
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.clk = SERDES_CLOCK_156P25M,
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.rate = SERDES_RATE_5G,
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.rate_mode = SERDES_QUARTER_RATE,
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.intf = SERDES_PHY_SGMII,
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.loopback = 0,
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};
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#else
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static int ks2_eth_start(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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#ifdef CONFIG_SOC_K2G
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keystone_rgmii_config(priv->phydev);
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#else
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keystone_sgmii_config(priv->phydev, priv->slave_port - 1,
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priv->sgmii_link_type);
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#endif
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udelay(10000);
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/* On chip switch configuration */
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ethss_config(target_get_switch_ctl(), SWITCH_MAX_PKT_SIZE);
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qm_init();
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if (ksnav_init(priv->netcp_pktdma, &priv->net_rx_buffs)) {
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error("ksnav_init failed\n");
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goto err_knav_init;
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}
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/*
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* Streaming switch configuration. If not present this
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* statement is defined to void in target.h.
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* If present this is usually defined to a series of register writes
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*/
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hw_config_streaming_switch();
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if (priv->has_mdio) {
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phy_startup(priv->phydev);
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if (priv->phydev->link == 0) {
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error("phy startup failed\n");
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goto err_phy_start;
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}
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}
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emac_gigabit_enable(dev);
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ethss_start();
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priv->emac_open = true;
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return 0;
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err_phy_start:
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ksnav_close(priv->netcp_pktdma);
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err_knav_init:
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qm_close();
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return -EFAULT;
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}
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static int ks2_eth_send(struct udevice *dev, void *packet, int length)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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genphy_update_link(priv->phydev);
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if (priv->phydev->link == 0)
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return -1;
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if (length < EMAC_MIN_ETHERNET_PKT_SIZE)
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length = EMAC_MIN_ETHERNET_PKT_SIZE;
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return ksnav_send(priv->netcp_pktdma, (u32 *)packet,
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length, (priv->slave_port) << 16);
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}
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static int ks2_eth_recv(struct udevice *dev, int flags, uchar **packetp)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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int pkt_size;
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u32 *pkt = NULL;
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priv->hd = ksnav_recv(priv->netcp_pktdma, &pkt, &pkt_size);
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if (priv->hd == NULL)
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return -EAGAIN;
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*packetp = (uchar *)pkt;
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return pkt_size;
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}
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static int ks2_eth_free_pkt(struct udevice *dev, uchar *packet,
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int length)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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ksnav_release_rxhd(priv->netcp_pktdma, priv->hd);
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return 0;
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}
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static void ks2_eth_stop(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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if (!priv->emac_open)
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return;
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ethss_stop();
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ksnav_close(priv->netcp_pktdma);
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qm_close();
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phy_shutdown(priv->phydev);
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priv->emac_open = false;
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}
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int ks2_eth_read_rom_hwaddr(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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u32 maca = 0;
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u32 macb = 0;
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/* Read the e-fuse mac address */
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if (priv->slave_port == 1) {
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maca = __raw_readl(MAC_ID_BASE_ADDR);
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macb = __raw_readl(MAC_ID_BASE_ADDR + 4);
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}
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pdata->enetaddr[0] = (macb >> 8) & 0xff;
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pdata->enetaddr[1] = (macb >> 0) & 0xff;
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pdata->enetaddr[2] = (maca >> 24) & 0xff;
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pdata->enetaddr[3] = (maca >> 16) & 0xff;
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pdata->enetaddr[4] = (maca >> 8) & 0xff;
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pdata->enetaddr[5] = (maca >> 0) & 0xff;
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return 0;
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}
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int ks2_eth_write_hwaddr(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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writel(mac_hi(pdata->enetaddr),
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DEVICE_EMACSW_BASE(pdata->iobase, priv->slave_port - 1) +
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CPGMACSL_REG_SA_HI);
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writel(mac_lo(pdata->enetaddr),
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DEVICE_EMACSW_BASE(pdata->iobase, priv->slave_port - 1) +
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CPGMACSL_REG_SA_LO);
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return 0;
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}
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static int ks2_eth_probe(struct udevice *dev)
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{
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struct ks2_eth_priv *priv = dev_get_priv(dev);
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struct mii_dev *mdio_bus;
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int ret;
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priv->dev = dev;
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/* These clock enables has to be moved to common location */
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if (cpu_is_k2g())
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writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
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/* By default, select PA PLL clock as PA clock source */
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#ifndef CONFIG_SOC_K2G
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if (psc_enable_module(KS2_LPSC_PA))
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return -EACCES;
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#endif
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if (psc_enable_module(KS2_LPSC_CPGMAC))
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return -EACCES;
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if (psc_enable_module(KS2_LPSC_CRYPTO))
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return -EACCES;
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if (cpu_is_k2e() || cpu_is_k2l())
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pll_pa_clk_sel();
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priv->net_rx_buffs.buff_ptr = rx_buffs,
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priv->net_rx_buffs.num_buffs = RX_BUFF_NUMS,
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priv->net_rx_buffs.buff_len = RX_BUFF_LEN,
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/* Register MDIO bus */
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mdio_bus = mdio_alloc();
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if (!mdio_bus) {
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error("MDIO alloc failed\n");
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return -ENOMEM;
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}
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priv->mdio_bus = mdio_bus;
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mdio_bus->read = keystone2_mdio_read;
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mdio_bus->write = keystone2_mdio_write;
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mdio_bus->reset = keystone2_mdio_reset;
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mdio_bus->priv = priv->mdio_base;
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sprintf(mdio_bus->name, "ethernet-mdio");
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ret = mdio_register(mdio_bus);
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if (ret) {
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error("MDIO bus register failed\n");
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return ret;
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}
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#ifndef CONFIG_SOC_K2G
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static void keystone2_net_serdes_setup(void)
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{
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ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII_BASE,
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&ks2_serdes_sgmii_156p25mhz,
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CONFIG_KSNET_SERDES_LANES_PER_SGMII);
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#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
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ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII2_BASE,
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&ks2_serdes_sgmii_156p25mhz,
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CONFIG_KSNET_SERDES_LANES_PER_SGMII);
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keystone2_net_serdes_setup();
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#endif
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|
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/* wait till setup */
|
||||
udelay(5000);
|
||||
priv->netcp_pktdma = &netcp_pktdma;
|
||||
|
||||
priv->phydev = phy_connect(mdio_bus, priv->phy_addr, dev, priv->phy_if);
|
||||
phy_config(priv->phydev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ks2_eth_remove(struct udevice *dev)
|
||||
{
|
||||
struct ks2_eth_priv *priv = dev_get_priv(dev);
|
||||
|
||||
free(priv->phydev);
|
||||
mdio_unregister(priv->mdio_bus);
|
||||
mdio_free(priv->mdio_bus);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct eth_ops ks2_eth_ops = {
|
||||
.start = ks2_eth_start,
|
||||
.send = ks2_eth_send,
|
||||
.recv = ks2_eth_recv,
|
||||
.free_pkt = ks2_eth_free_pkt,
|
||||
.stop = ks2_eth_stop,
|
||||
.read_rom_hwaddr = ks2_eth_read_rom_hwaddr,
|
||||
.write_hwaddr = ks2_eth_write_hwaddr,
|
||||
};
|
||||
|
||||
|
||||
static int ks2_eth_ofdata_to_platdata(struct udevice *dev)
|
||||
{
|
||||
struct ks2_eth_priv *priv = dev_get_priv(dev);
|
||||
struct eth_pdata *pdata = dev_get_platdata(dev);
|
||||
const void *fdt = gd->fdt_blob;
|
||||
int interfaces;
|
||||
int interface_0;
|
||||
int netcp_gbe_0;
|
||||
int phy;
|
||||
int mdio;
|
||||
u32 dma_channel[6];
|
||||
|
||||
interfaces = fdt_subnode_offset(fdt, dev->of_offset,
|
||||
"netcp-interfaces");
|
||||
interface_0 = fdt_subnode_offset(fdt, interfaces, "interface-0");
|
||||
|
||||
netcp_gbe_0 = fdtdec_lookup_phandle(fdt, interface_0, "netcp-gbe");
|
||||
priv->link_type = fdtdec_get_int(fdt, netcp_gbe_0,
|
||||
"link-interface", -1);
|
||||
priv->slave_port = fdtdec_get_int(fdt, netcp_gbe_0, "slave-port", -1);
|
||||
/* U-Boot slave port number starts with 1 instead of 0 */
|
||||
priv->slave_port += 1;
|
||||
|
||||
phy = fdtdec_lookup_phandle(fdt, netcp_gbe_0, "phy-handle");
|
||||
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
|
||||
|
||||
mdio = fdt_parent_offset(fdt, phy);
|
||||
if (mdio < 0) {
|
||||
error("mdio dt not found\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg");
|
||||
|
||||
if (priv->link_type == LINK_TYPE_MAC_TO_PHY_MODE) {
|
||||
priv->phy_if = PHY_INTERFACE_MODE_SGMII;
|
||||
pdata->phy_interface = priv->phy_if;
|
||||
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
|
||||
priv->has_mdio = true;
|
||||
}
|
||||
pdata->iobase = dev_get_addr(dev);
|
||||
|
||||
fdtdec_get_int_array(fdt, dev->of_offset, "ti,navigator-dmas",
|
||||
dma_channel, 6);
|
||||
priv->net_rx_buffs.rx_flow = dma_channel[1];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct udevice_id ks2_eth_ids[] = {
|
||||
{ .compatible = "ti,netcp-1.0" },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
||||
U_BOOT_DRIVER(eth_ks2) = {
|
||||
.name = "eth_ks2",
|
||||
.id = UCLASS_ETH,
|
||||
.of_match = ks2_eth_ids,
|
||||
.ofdata_to_platdata = ks2_eth_ofdata_to_platdata,
|
||||
.probe = ks2_eth_probe,
|
||||
.remove = ks2_eth_remove,
|
||||
.ops = &ks2_eth_ops,
|
||||
.priv_auto_alloc_size = sizeof(struct ks2_eth_priv),
|
||||
.platdata_auto_alloc_size = sizeof(struct eth_pdata),
|
||||
.flags = DM_FLAG_ALLOC_PRIV_DMA,
|
||||
};
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user