ARM: DRA7xx: power Add support for tps659038 PMIC
TPS659038 is the power IC used in DRA7XX boards. Adding support for this and also adding pmic data for DRA7XX boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
@@ -30,6 +30,7 @@
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* MA 02111-1307 USA
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* MA 02111-1307 USA
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <i2c.h>
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#include <asm/omap_common.h>
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#include <asm/omap_common.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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@@ -487,6 +488,9 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
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u32 offset = volt_mv;
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u32 offset = volt_mv;
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int ret = 0;
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int ret = 0;
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if (!volt_mv)
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return;
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pmic->pmic_bus_init();
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pmic->pmic_bus_init();
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/* See if we can first get the GPIO if needed */
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/* See if we can first get the GPIO if needed */
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if (pmic->gpio_en)
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if (pmic->gpio_en)
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@@ -543,6 +547,15 @@ void scale_vcores(struct vcores_data const *vcores)
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do_scale_vcore(vcores->mm.addr, vcores->mm.value,
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do_scale_vcore(vcores->mm.addr, vcores->mm.value,
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vcores->mm.pmic);
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vcores->mm.pmic);
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do_scale_vcore(vcores->gpu.addr, vcores->gpu.value,
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vcores->gpu.pmic);
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do_scale_vcore(vcores->eve.addr, vcores->eve.value,
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vcores->eve.pmic);
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do_scale_vcore(vcores->iva.addr, vcores->iva.value,
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vcores->iva.pmic);
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if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
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if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
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/* Configure LDO SRAM "magic" bits */
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/* Configure LDO SRAM "magic" bits */
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writel(2, (*prcm)->prm_sldo_core_setup);
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writel(2, (*prcm)->prm_sldo_core_setup);
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@@ -732,3 +745,13 @@ void prcm_init(void)
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if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context())
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if (OMAP_INIT_CONTEXT_SPL != omap_hw_init_context())
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enable_basic_uboot_clocks();
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enable_basic_uboot_clocks();
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}
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}
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void gpi2c_init(void)
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{
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static int gpi2c = 1;
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if (gpi2c) {
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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gpi2c = 0;
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}
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}
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@@ -26,6 +26,7 @@
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* MA 02111-1307 USA
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* MA 02111-1307 USA
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <palmas.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/omap_common.h>
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#include <asm/omap_common.h>
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@@ -294,6 +295,19 @@ struct pmic_data palmas = {
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.pmic_write = omap_vc_bypass_send_value,
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.pmic_write = omap_vc_bypass_send_value,
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};
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};
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struct pmic_data tps659038 = {
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.base_offset = PALMAS_SMPS_BASE_VOLT_UV,
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.step = 10000, /* 10 mV represented in uV */
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/*
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* Offset codes 1-6 all give the base voltage in Palmas
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* Offset code 0 switches OFF the SMPS
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*/
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.start_code = 6,
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.i2c_slave_addr = TPS659038_I2C_SLAVE_ADDR,
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.pmic_bus_init = gpi2c_init,
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.pmic_write = palmas_i2c_write_u8,
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};
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struct vcores_data omap5430_volts = {
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struct vcores_data omap5430_volts = {
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.mpu.value = VDD_MPU,
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.mpu.value = VDD_MPU,
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.mpu.addr = SMPS_REG_ADDR_12_MPU,
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.mpu.addr = SMPS_REG_ADDR_12_MPU,
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@@ -322,6 +336,28 @@ struct vcores_data omap5430_volts_es2 = {
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.mm.pmic = &palmas,
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.mm.pmic = &palmas,
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};
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};
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struct vcores_data dra752_volts = {
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.mpu.value = VDD_MPU_DRA752,
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.mpu.addr = TPS659038_REG_ADDR_SMPS12_MPU,
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.mpu.pmic = &tps659038,
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.eve.value = VDD_EVE_DRA752,
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.eve.addr = TPS659038_REG_ADDR_SMPS45_EVE,
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.eve.pmic = &tps659038,
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.gpu.value = VDD_GPU_DRA752,
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.gpu.addr = TPS659038_REG_ADDR_SMPS6_GPU,
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.gpu.pmic = &tps659038,
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.core.value = VDD_CORE_DRA752,
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.core.addr = TPS659038_REG_ADDR_SMPS7_CORE,
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.core.pmic = &tps659038,
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.iva.value = VDD_IVA_DRA752,
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.iva.addr = TPS659038_REG_ADDR_SMPS8_IVA,
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.iva.pmic = &tps659038,
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};
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/*
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/*
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* Enable essential clock domains, modules and
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* Enable essential clock domains, modules and
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* do some additional special settings needed
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* do some additional special settings needed
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@@ -562,7 +598,7 @@ void hw_data_init(void)
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case DRA752_ES1_0:
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case DRA752_ES1_0:
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*prcm = &dra7xx_prcm;
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*prcm = &dra7xx_prcm;
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*dplls_data = &dra7xx_dplls;
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*dplls_data = &dra7xx_dplls;
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*omap_vcores = &omap5430_volts_es2;
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*omap_vcores = &dra752_volts;
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*ctrl = &dra7xx_ctrl;
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*ctrl = &dra7xx_ctrl;
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break;
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break;
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@@ -58,6 +58,7 @@ void save_omap_boot_params(void);
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void init_omap_revision(void);
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void init_omap_revision(void);
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void do_io_settings(void);
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void do_io_settings(void);
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void sri2c_init(void);
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void sri2c_init(void);
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void gpi2c_init(void);
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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u32 warm_reset(void);
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u32 warm_reset(void);
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void force_emif_self_refresh(void);
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void force_emif_self_refresh(void);
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@@ -212,9 +212,24 @@
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#define VDD_MPU_ES2_LOW 880
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#define VDD_MPU_ES2_LOW 880
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#define VDD_MM_ES2_LOW 880
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#define VDD_MM_ES2_LOW 880
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/* TPS659038 Voltage settings in mv for OPP_NOMINAL */
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#define VDD_MPU_DRA752 1090
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#define VDD_EVE_DRA752 1060
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#define VDD_GPU_DRA752 1060
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#define VDD_CORE_DRA752 1030
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#define VDD_IVA_DRA752 1060
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/* Standard offset is 0.5v expressed in uv */
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/* Standard offset is 0.5v expressed in uv */
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#define PALMAS_SMPS_BASE_VOLT_UV 500000
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#define PALMAS_SMPS_BASE_VOLT_UV 500000
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/* TPS659038 */
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#define TPS659038_I2C_SLAVE_ADDR 0x58
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#define TPS659038_REG_ADDR_SMPS12_MPU 0x23
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#define TPS659038_REG_ADDR_SMPS45_EVE 0x2B
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#define TPS659038_REG_ADDR_SMPS6_GPU 0x2F
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#define TPS659038_REG_ADDR_SMPS7_CORE 0x33
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#define TPS659038_REG_ADDR_SMPS8_IVA 0x37
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/* TPS */
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/* TPS */
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#define TPS62361_I2C_SLAVE_ADDR 0x60
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#define TPS62361_I2C_SLAVE_ADDR 0x60
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#define TPS62361_REG_ADDR_SET0 0x0
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#define TPS62361_REG_ADDR_SET0 0x0
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@@ -62,6 +62,7 @@ void save_omap_boot_params(void);
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void init_omap_revision(void);
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void init_omap_revision(void);
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void do_io_settings(void);
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void do_io_settings(void);
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void sri2c_init(void);
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void sri2c_init(void);
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void gpi2c_init(void);
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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u32 warm_reset(void);
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u32 warm_reset(void);
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void force_emif_self_refresh(void);
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void force_emif_self_refresh(void);
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@@ -516,6 +516,9 @@ struct vcores_data {
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struct volts mpu;
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struct volts mpu;
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struct volts core;
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struct volts core;
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struct volts mm;
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struct volts mm;
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struct volts gpu;
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struct volts eve;
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struct volts iva;
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};
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};
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extern struct prcm_regs const **prcm;
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extern struct prcm_regs const **prcm;
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