ARM: mvebu: add additional information to board_add_ram_info()
Display more information about the current RAM configuration. With these changes the output on a 88F6820 board is SoC: MV88F6820-A0 at 1600 MHz DRAM: 2 GiB (800 MHz, 32-bit, ECC not enabled) Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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@ -216,6 +216,35 @@ static int ecc_enabled(void)
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return 0;
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return 0;
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}
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}
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/* Return the width of the DRAM bus, or 0 for unknown. */
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static int bus_width(void)
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{
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int full_width = 0;
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if (reg_read(REG_SDRAM_CONFIG_ADDR) & (1 << REG_SDRAM_CONFIG_WIDTH_OFFS))
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full_width = 1;
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switch (mvebu_soc_family()) {
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case MVEBU_SOC_AXP:
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return full_width ? 64 : 32;
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break;
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case MVEBU_SOC_A375:
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case MVEBU_SOC_A38X:
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case MVEBU_SOC_MSYS:
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return full_width ? 32 : 16;
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default:
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return 0;
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}
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}
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static int cycle_mode(void)
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{
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int val = reg_read(REG_DUNIT_CTRL_LOW_ADDR);
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return (val >> REG_DUNIT_CTRL_LOW_2T_OFFS) & REG_DUNIT_CTRL_LOW_2T_MASK;
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}
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#else
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#else
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static void dram_ecc_scrubbing(void)
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static void dram_ecc_scrubbing(void)
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{
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{
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@ -295,10 +324,26 @@ int dram_init_banksize(void)
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void board_add_ram_info(int use_default)
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void board_add_ram_info(int use_default)
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{
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{
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struct sar_freq_modes sar_freq;
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struct sar_freq_modes sar_freq;
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int mode;
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int width;
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get_sar_freq(&sar_freq);
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get_sar_freq(&sar_freq);
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printf(" (%d MHz, ", sar_freq.d_clk);
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printf(" (%d MHz, ", sar_freq.d_clk);
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width = bus_width();
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if (width)
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printf("%d-bit, ", width);
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mode = cycle_mode();
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/* Mode 0 = Single cycle
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* Mode 1 = Two cycles (2T)
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* Mode 2 = Three cycles (3T)
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*/
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if (mode == 1)
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printf("2T, ");
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if (mode == 2)
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printf("3T, ");
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if (ecc_enabled())
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if (ecc_enabled())
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printf("ECC");
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printf("ECC");
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else
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else
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