arm64: zynqmp: Update tps53681 i2c address
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address is 7bit where c0h is 1100000 which is 0x60. This will fix issues reported by make dtbs that 0xc0 is above 7bit regular i2c address range. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
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@ -260,9 +260,9 @@
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reg = <0x45>;
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shunt-resistor = <5000>;
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};
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tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */
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tps53681@60 { /* u53 - 0xc0 - FIXME name - don't know what it does - also vcc_io_soc */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0xc0>;
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reg = <0x60>;
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};
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};
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i2c@3 { /* fmc1 via JA2G */
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@ -247,9 +247,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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reg_vccint: tps53681@c0 { /* u69 */
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reg_vccint: tps53681@60 { /* u69 - 0xc0 */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0xc0>;
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reg = <0x60>;
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};
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reg_vcc_pmc: tps544@7 { /* u80 */
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compatible = "ti,tps544b25";
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@ -239,9 +239,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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reg_vccint: tps53681@c0 { /* u69 */
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reg_vccint: tps53681@60 { /* u69 - 0xc0 */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0xc0>;
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reg = <0x60>;
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};
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reg_vcc_pmc: tps544@7 { /* u80 */
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compatible = "ti,tps544b25";
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@ -239,9 +239,9 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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reg_vccint: tps53681@c0 { /* u69 */
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reg_vccint: tps53681@60 { /* u69 - 0xc0 */
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compatible = "ti,tps53681", "ti,tps53679";
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reg = <0xc0>;
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reg = <0x60>;
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};
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reg_vcc_pmc: tps544@7 { /* u80 */
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compatible = "ti,tps544b25";
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