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arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon

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This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Manish Narani 2017-07-19 21:16:33 +05:30 committed by Michal Simek
parent 0aada397b5
commit 5e3c90d238
1 changed files with 4 additions and 0 deletions
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4
arch/arm/dts/zynqmp.dtsi
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@ -837,6 +837,8 @@
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
power-domains = <&pd_sd0>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
sdhci1: sdhci@ff170000 {
@ -851,6 +853,8 @@
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
power-domains = <&pd_sd1>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
pinctrl0: pinctrl@ff180000 {