powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq() and every 86xx board uses get_bus_freq(). If implement get_ddr_freq() as a static inline to call get_bus_freq() we can remove fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq() directly. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
@@ -118,11 +118,6 @@ static void get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
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}
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -17,11 +17,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int
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fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void
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fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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@@ -18,11 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int
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fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void
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fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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@@ -18,12 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,12 +18,6 @@ get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -17,11 +17,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_bus_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_bus_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
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/* Get clk_adjust, cpo, write_data_delay, according to the board ddr
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* freqency and n_banks specified in board_specific_parameters table.
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*/
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ddr_freq = fsl_ddr_get_mem_data_rate() / 1000000;
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ddr_freq = get_ddr_freq(0) / 1000000;
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for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
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if (pdimm[j].n_ranks > 0) {
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for (i = 0; i < num_params; i++) {
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@@ -15,11 +15,6 @@
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#include <asm/fsl_ddr_sdram.h>
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#include <asm/fsl_ddr_dimm_params.h>
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num)
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{
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int ret;
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@@ -17,11 +17,6 @@ static void get_spd(generic_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int
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fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void
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fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_bus_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int
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fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void
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fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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@@ -18,14 +18,6 @@ get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
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}
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unsigned int
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fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void
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fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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@@ -32,11 +32,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_bus_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
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unsigned int datarate;
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get_sys_info(&sysinfo);
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datarate = fsl_ddr_get_mem_data_rate() / 1000000;
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datarate = get_ddr_freq(0) / 1000000;
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for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) {
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if ((bopts[i].datarate_mhz_low <= datarate) &&
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@@ -27,11 +27,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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}
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -33,11 +33,6 @@ static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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sizeof(ddr2_spd_eeprom_t));
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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{
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@@ -46,11 +46,6 @@ void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
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}
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}
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unsigned int fsl_ddr_get_mem_data_rate(void)
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{
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return get_ddr_freq(0);
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}
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/*
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* There are traditionally three board-specific SDRAM timing parameters
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* which must be calculated based on the particular PCB artwork. These are:
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Block a user