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clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HW

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The generic mux clock code for CCF requires reading the clock multiplexer
value from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.

The new field in the mux structure (accessible only when sandbox is run)
has been introduced for this purpose.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Lukasz Majewski 2019-06-24 15:50:49 +02:00 committed by Stefano Babic
parent 6bb15d6f07
commit 5da0095e3a
2 changed files with 13 additions and 1 deletions
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10
drivers/clk/clk-mux.c
View File

@ -64,7 +64,12 @@ static u8 clk_mux_get_parent(struct clk *clk)
struct clk_mux *mux = to_clk_mux(clk);
u32 val;
val = readl(mux->reg) >> mux->shift;
#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
val = mux->io_mux_val;
#else
val = readl(mux->reg);
#endif
val >>= mux->shift;
val &= mux->mask;
return clk_mux_val_to_index(clk, mux->table, mux->flags, val);
@ -108,6 +113,9 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name,
mux->mask = mask;
mux->flags = clk_mux_flags;
mux->table = table;
#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
mux->io_mux_val = *(u32 *)reg;
#endif
clk = &mux->clk;

4
include/linux/clk-provider.h
View File

@ -59,6 +59,10 @@ struct clk_mux {
*/
const char * const *parent_names;
u8 num_parents;
#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
u32 io_mux_val;
#endif
};
#define to_clk_mux(_clk) container_of(_clk, struct clk_mux, clk)