powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init
Rather than having #defines DATARATE_*_MHZ, lets just match what we do on the SPD code and convert the DDR frequency into MHZ and just compare with a constant. Based on patch from Poonam Aggrwal. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -31,19 +31,21 @@ extern fixed_ddr_parm_t fixed_ddr_parm_1[];
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phys_size_t fixed_sdram(void)
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phys_size_t fixed_sdram(void)
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{
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{
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int i;
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int i;
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sys_info_t sysinfo;
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char buf[32];
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char buf[32];
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fsl_ddr_cfg_regs_t ddr_cfg_regs;
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fsl_ddr_cfg_regs_t ddr_cfg_regs;
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phys_size_t ddr_size;
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phys_size_t ddr_size;
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unsigned int lawbar1_target_id;
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unsigned int lawbar1_target_id;
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ulong ddr_freq, ddr_freq_mhz;
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ddr_freq = get_ddr_freq(0);
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ddr_freq_mhz = ddr_freq / 1000000;
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get_sys_info(&sysinfo);
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printf("Configuring DDR for %s MT/s data rate\n",
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printf("Configuring DDR for %s MT/s data rate\n",
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strmhz(buf, sysinfo.freqDDRBus));
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strmhz(buf, ddr_freq));
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for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) {
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for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) {
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if ((sysinfo.freqDDRBus > fixed_ddr_parm_0[i].min_freq) &&
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if ((ddr_freq_mhz > fixed_ddr_parm_0[i].min_freq) &&
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(sysinfo.freqDDRBus <= fixed_ddr_parm_0[i].max_freq)) {
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(ddr_freq_mhz <= fixed_ddr_parm_0[i].max_freq)) {
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memcpy(&ddr_cfg_regs,
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memcpy(&ddr_cfg_regs,
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fixed_ddr_parm_0[i].ddr_settings,
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fixed_ddr_parm_0[i].ddr_settings,
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sizeof(ddr_cfg_regs));
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sizeof(ddr_cfg_regs));
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@ -53,7 +55,7 @@ phys_size_t fixed_sdram(void)
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if (fixed_ddr_parm_0[i].max_freq == 0)
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if (fixed_ddr_parm_0[i].max_freq == 0)
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panic("Unsupported DDR data rate %s MT/s data rate\n",
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panic("Unsupported DDR data rate %s MT/s data rate\n",
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strmhz(buf, sysinfo.freqDDRBus));
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strmhz(buf, ddr_freq));
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ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
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ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2009-2010 Freescale Semiconductor, Inc.
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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*
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* This program is free software; you can redistribute it and/or
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* modify it under the terms of the GNU General Public License
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@ -9,12 +9,6 @@
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#include <common.h>
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#include <common.h>
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#include <asm/fsl_ddr_sdram.h>
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#include <asm/fsl_ddr_sdram.h>
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#define DATARATE_800MHZ 800000000
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#define DATARATE_900MHZ 900000000
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#define DATARATE_1000MHZ 1000000000
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#define DATARATE_1200MHZ 1200000000
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#define DATARATE_1300MHZ 1300000000
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#define CONFIG_SYS_DDR_TIMING_3_1200 0x01030000
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#define CONFIG_SYS_DDR_TIMING_3_1200 0x01030000
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#define CONFIG_SYS_DDR_TIMING_0_1200 0xCC550104
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#define CONFIG_SYS_DDR_TIMING_0_1200 0xCC550104
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#define CONFIG_SYS_DDR_TIMING_1_1200 0x868FAA45
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#define CONFIG_SYS_DDR_TIMING_1_1200 0x868FAA45
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@ -340,17 +334,17 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_1200_2nd = {
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};
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};
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fixed_ddr_parm_t fixed_ddr_parm_0[] = {
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fixed_ddr_parm_t fixed_ddr_parm_0[] = {
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{DATARATE_800MHZ, DATARATE_900MHZ, &ddr_cfg_regs_800},
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{800, 900, &ddr_cfg_regs_800},
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{DATARATE_900MHZ, DATARATE_1000MHZ, &ddr_cfg_regs_900},
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{900, 1000, &ddr_cfg_regs_900},
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{DATARATE_1000MHZ, DATARATE_1200MHZ, &ddr_cfg_regs_1000},
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{1000, 1200, &ddr_cfg_regs_1000},
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{DATARATE_1200MHZ, DATARATE_1300MHZ, &ddr_cfg_regs_1200},
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{1200, 1300, &ddr_cfg_regs_1200},
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{0, 0, NULL}
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{0, 0, NULL}
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};
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};
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fixed_ddr_parm_t fixed_ddr_parm_1[] = {
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fixed_ddr_parm_t fixed_ddr_parm_1[] = {
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{DATARATE_800MHZ, DATARATE_900MHZ, &ddr_cfg_regs_800_2nd},
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{800, 900, &ddr_cfg_regs_800_2nd},
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{DATARATE_900MHZ, DATARATE_1000MHZ, &ddr_cfg_regs_900_2nd},
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{900, 1000, &ddr_cfg_regs_900_2nd},
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{DATARATE_1000MHZ, DATARATE_1200MHZ, &ddr_cfg_regs_1000_2nd},
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{1000, 1200, &ddr_cfg_regs_1000_2nd},
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{DATARATE_1200MHZ, DATARATE_1300MHZ, &ddr_cfg_regs_1200_2nd},
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{1200, 1300, &ddr_cfg_regs_1200_2nd},
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{0, 0, NULL}
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{0, 0, NULL}
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};
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};
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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* Copyright 2009, 2011 Freescale Semiconductor, Inc.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@ -33,11 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
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extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
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extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
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unsigned int ctrl_num);
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unsigned int ctrl_num);
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#define DATARATE_400MHZ 400000000
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#define DATARATE_533MHZ 533333333
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#define DATARATE_667MHZ 666666666
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#define DATARATE_800MHZ 800000000
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#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
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#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
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#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
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#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
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#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
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#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
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@ -204,27 +199,29 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {
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phys_size_t fixed_sdram (void)
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phys_size_t fixed_sdram (void)
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{
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{
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sys_info_t sysinfo;
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char buf[32];
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char buf[32];
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fsl_ddr_cfg_regs_t ddr_cfg_regs;
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fsl_ddr_cfg_regs_t ddr_cfg_regs;
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size_t ddr_size;
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size_t ddr_size;
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struct cpu_type *cpu;
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struct cpu_type *cpu;
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ulong ddr_freq, ddr_freq_mhz;
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ddr_freq = get_ddr_freq(0);
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ddr_freq_mhz = ddr_freq / 1000000;
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get_sys_info(&sysinfo);
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printf("Configuring DDR for %s MT/s data rate\n",
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printf("Configuring DDR for %s MT/s data rate\n",
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strmhz(buf, sysinfo.freqDDRBus));
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strmhz(buf, ddr_freq));
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if(sysinfo.freqDDRBus <= DATARATE_400MHZ)
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if(ddr_freq_mhz <= 400)
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_400, sizeof(ddr_cfg_regs));
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_400, sizeof(ddr_cfg_regs));
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else if(sysinfo.freqDDRBus <= DATARATE_533MHZ)
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else if(ddr_freq_mhz <= 533)
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_533, sizeof(ddr_cfg_regs));
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_533, sizeof(ddr_cfg_regs));
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else if(sysinfo.freqDDRBus <= DATARATE_667MHZ)
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else if(ddr_freq_mhz <= 667)
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_667, sizeof(ddr_cfg_regs));
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_667, sizeof(ddr_cfg_regs));
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else if(sysinfo.freqDDRBus <= DATARATE_800MHZ)
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else if(ddr_freq_mhz <= 800)
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_800, sizeof(ddr_cfg_regs));
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memcpy(&ddr_cfg_regs, &ddr_cfg_regs_800, sizeof(ddr_cfg_regs));
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else
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else
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panic("Unsupported DDR data rate %s MT/s data rate\n",
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panic("Unsupported DDR data rate %s MT/s data rate\n",
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strmhz(buf, sysinfo.freqDDRBus));
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strmhz(buf, ddr_freq));
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cpu = gd->cpu;
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cpu = gd->cpu;
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/* P1020 and it's derivatives support max 32bit DDR width */
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/* P1020 and it's derivatives support max 32bit DDR width */
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