leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARMv8: Enable SMC instruction

Browse Source 
PSCI implementation needs the SMC instruction to be enabled.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
macro.wave.z@gmail.com 2016-12-08 11:58:23 +08:00 committed by York Sun
parent df88cb3b91
commit 5cc8d6682f
1 changed files with 7 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/include/asm/macro.h
View File

@ -182,11 +182,17 @@ lr .req x30
/* /*
* The next lower exception level is AArch64, 64bit EL2 | HCE | * The next lower exception level is AArch64, 64bit EL2 | HCE |
* SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1. * RES1 (Bits[5:4]) | Non-secure EL0/EL1.
* and the SMD depends on requirements.
*/ */
#ifdef CONFIG_ARMV8_PSCI
ldr \tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
SCR_EL3_RES1 | SCR_EL3_NS_EN)
#else
ldr \tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\ ldr \tmp, =(SCR_EL3_RW_AARCH64 | SCR_EL3_HCE_EN |\
SCR_EL3_SMD_DIS | SCR_EL3_RES1 |\ SCR_EL3_SMD_DIS | SCR_EL3_RES1 |\
SCR_EL3_NS_EN) SCR_EL3_NS_EN)
#endif
msr scr_el3, \tmp msr scr_el3, \tmp
/* Return to the EL2_SP2 mode from EL3 */ /* Return to the EL2_SP2 mode from EL3 */