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Merge branch '2022-04-01-Kconfig-migrations-and-cleanups' into next

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- Migrate a number of CONFIG symbols to Kconfig.  Of note, with this we
  now complete migration of CONFIG_SYS_EXTRA_OPTIONS.
This commit is contained in:
Tom Rini 2022-04-01 10:35:19 -04:00
commit 5b160c3a13
643 changed files with 941 additions and 1715 deletions
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6
.azure-pipelines.yml
View File

@ -68,8 +68,10 @@ stages:
-e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \
| sort -u > $KSYMLST
for CFG in `find include/configs -name "*.h"`; do
grep '#define[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | \
(grep '#define[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ; \
grep '#undef[[:blank:]]CONFIG_' $CFG | \
sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') | \
sort -u > ${KUSEDLST} || true
NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \
cut -d , -f 3`

6
.gitlab-ci.yml
View File

@ -129,8 +129,10 @@ check for migrated symbols in board header:
-e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p'
| sort -u > $KSYMLST;
for CFG in `find include/configs -name "*.h"`; do
grep '#define[[:blank:]]CONFIG_' $CFG |
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' |
(grep '#define[[:blank:]]CONFIG_' $CFG |
sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ;
grep '#undef[[:blank:]]CONFIG_' $CFG |
sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') |
sort -u > ${KUSEDLST} || true;
NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} |
cut -d , -f 3`;

10
README
View File

@ -403,10 +403,6 @@ The following options need to be configured:
This CONFIG is defined when the CPC is configured as SRAM at the
time of U-Boot entry and is required to be re-initialized.
CONFIG_DEEP_SLEEP
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
@ -1921,12 +1917,6 @@ Configuration Settings:
- CONFIG_SYS_FLASH_BASE:
Physical start address of Flash memory.
- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
(CONFIG_SYS_TEXT_BASE) used when linking) - same as
CONFIG_SYS_FLASH_BASE when booting from flash.
- CONFIG_SYS_MONITOR_LEN:
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is

2
arch/Kconfig
View File

@ -448,3 +448,5 @@ source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"
source "board/keymile/Kconfig"

1
arch/arm/Kconfig
View File

@ -2280,7 +2280,6 @@ source "board/vscom/baltos/Kconfig"
source "board/phytium/durian/Kconfig"
source "board/phytium/pomelo/Kconfig"
source "board/xen/xenguest_arm64/Kconfig"
source "board/keymile/Kconfig"
source "arch/arm/Kconfig.debug"

20
arch/arm/mach-exynos/exynos4_setup.h
View File

@ -11,19 +11,6 @@
#include <config.h>
#include <asm/arch/cpu.h>
#ifdef CONFIG_CLK_800_330_165
#define DRAM_CLK_330
#endif
#ifdef CONFIG_CLK_1000_200_200
#define DRAM_CLK_200
#endif
#ifdef CONFIG_CLK_1000_330_165
#define DRAM_CLK_330
#endif
#ifdef CONFIG_CLK_1000_400_200
#define DRAM_CLK_400
#endif
/* Bus Configuration Register Address */
#define ASYNC_CONFIG 0x10010350
@ -562,15 +549,8 @@ struct mem_timings {
#define TIMINGPOWER_VAL 0x52000A3C
#else
#define TIMINGREF_VAL 0x000000BC
#ifdef DRAM_CLK_330
#define TIMINGROW_VAL 0x3545548d
#define TIMINGDATA_VAL 0x45430506
#define TIMINGPOWER_VAL 0x4439033c
#endif
#ifdef DRAM_CLK_400
#define TIMINGROW_VAL 0x45430506
#define TIMINGDATA_VAL 0x56500506
#define TIMINGPOWER_VAL 0x5444033d
#endif
#endif
#endif

1
arch/arm/mach-kirkwood/Kconfig
View File

@ -131,7 +131,6 @@ source "board/cloudengines/pogo_e02/Kconfig"
source "board/cloudengines/pogo_v4/Kconfig"
source "board/d-link/dns325/Kconfig"
source "board/iomega/iconnect/Kconfig"
source "board/keymile/Kconfig"
source "board/LaCie/net2big_v2/Kconfig"
source "board/LaCie/netspace_v2/Kconfig"
source "board/raidsonic/ib62x0/Kconfig"

2
arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
View File

@ -62,7 +62,7 @@ static u32 board_id_get(void)
return DB_78X60_AMC_ID;
#elif defined(CONFIG_DB_78X60_PCAC_REV2)
return DB_78X60_PCAC_REV2_ID;
#elif defined(CONFIG_DB_784MP_GP)
#elif defined(CONFIG_TARGET_DB_MV784MP_GP)
return DB_784MP_GP_ID;
#elif defined(CONFIG_RD_78460_CUSTOMER)
return RD_78460_CUSTOMER_ID;

13
arch/arm/mach-omap2/am33xx/Kconfig
View File

@ -207,6 +207,19 @@ config TARGET_PDU001
endchoice
config CLOCK_SYNTHESIZER
bool "CDCE913 and CDCEL913 clock synthesizer support"
help
The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
high performance , programmable clock synthesizers. They generate
up to 3 output clocks from a single input frequency. Each output can
be programmed for any clock-frequency.
config CLK_SYNTHESIZER_I2C_ADDR
hex "Clock synthesizer i2c bus address"
depends on CLOCK_SYNTHESIZER
default 0x65
endif
if AM43XX

82
arch/arm/mach-omap2/am33xx/board.c
View File

@ -207,10 +207,8 @@ int cpu_mmc_init(struct bd_info *bis)
#define RTC_BOARD_TYPE_SHIFT 16
/* AM33XX has two MUSB controllers which can be host or gadget */
#if (defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)) && \
(defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \
(!CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW))
#if (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \
defined(CONFIG_SPL_BUILD)
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
@ -219,7 +217,7 @@ static struct musb_hdrc_config musb_config = {
.ram_bits = 12,
};
#if CONFIG_IS_ENABLED(DM_USB) && !CONFIG_IS_ENABLED(OF_CONTROL)
#ifdef CONFIG_AM335X_USB0
static struct ti_musb_plat usb0 = {
.base = (void *)USB0_OTG_BASE,
.ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl0,
@ -229,7 +227,9 @@ static struct ti_musb_plat usb0 = {
.platform_ops = &musb_dsps_ops,
},
};
#endif
#ifdef CONFIG_AM335X_USB1
static struct ti_musb_plat usb1 = {
.base = (void *)USB1_OTG_BASE,
.ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl1,
@ -239,6 +239,7 @@ static struct ti_musb_plat usb1 = {
.platform_ops = &musb_dsps_ops,
},
};
#endif
U_BOOT_DRVINFOS(am33xx_usbs) = {
#ifdef CONFIG_AM335X_USB0_PERIPHERAL
@ -257,77 +258,6 @@ int arch_misc_init(void)
{
return 0;
}
#else
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* USB 2.0 PHY Control */
#define CM_PHY_PWRDN (1 << 0)
#define CM_PHY_OTG_PWRDN (1 << 1)
#define OTGVDET_EN (1 << 19)
#define OTGSESSENDEN (1 << 20)
static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr)
{
if (on) {
clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN,
OTGVDET_EN | OTGSESSENDEN);
} else {
clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
}
}
#ifdef CONFIG_AM335X_USB0
static void am33xx_otg0_set_phy_power(struct udevice *dev, u8 on)
{
am33xx_usb_set_phy_power(on, &cdev->usb_ctrl0);
}
struct omap_musb_board_data otg0_board_data = {
.set_phy_power = am33xx_otg0_set_phy_power,
};
static struct musb_hdrc_platform_data otg0_plat = {
.mode = CONFIG_AM335X_USB0_MODE,
.config = &musb_config,
.power = 50,
.platform_ops = &musb_dsps_ops,
.board_data = &otg0_board_data,
};
#endif
#ifdef CONFIG_AM335X_USB1
static void am33xx_otg1_set_phy_power(struct udevice *dev, u8 on)
{
am33xx_usb_set_phy_power(on, &cdev->usb_ctrl1);
}
struct omap_musb_board_data otg1_board_data = {
.set_phy_power = am33xx_otg1_set_phy_power,
};
static struct musb_hdrc_platform_data otg1_plat = {
.mode = CONFIG_AM335X_USB1_MODE,
.config = &musb_config,
.power = 50,
.platform_ops = &musb_dsps_ops,
.board_data = &otg1_board_data,
};
#endif
int arch_misc_init(void)
{
#ifdef CONFIG_AM335X_USB0
musb_register(&otg0_plat, &otg0_board_data,
(void *)USB0_OTG_BASE);
#endif
#ifdef CONFIG_AM335X_USB1
musb_register(&otg1_plat, &otg1_board_data,
(void *)USB1_OTG_BASE);
#endif
return 0;
}
#endif
#else /* CONFIG_USB_MUSB_* && CONFIG_AM335X_USB* && !CONFIG_DM_USB */
int arch_misc_init(void)

14
arch/arm/mach-omap2/am33xx/clk_synthesizer.c
View File

@ -31,12 +31,12 @@ static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
#if !CONFIG_IS_ENABLED(DM_I2C)
/* Send the command byte */
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
rc = i2c_write(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
if (rc)
printf("Failed to send command to clock synthesizer\n");
/* Read the Data */
return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
return i2c_read(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
#else
/* Send the command byte */
rc = dm_i2c_reg_write(dev, addr, *buf);
@ -73,7 +73,7 @@ static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
cmd[1] = val;
#if !CONFIG_IS_ENABLED(DM_I2C)
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
rc = i2c_write(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
#else
rc = dm_i2c_write(dev, addr, cmd, 2);
#endif
@ -97,17 +97,17 @@ int setup_clock_synthesizer(struct clk_synth *data)
u8 val = 0;
struct udevice *dev = NULL;
#if !CONFIG_IS_ENABLED(DM_I2C)
rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
rc = i2c_probe(CONFIG_CLK_SYNTHESIZER_I2C_ADDR);
if (rc) {
printf("i2c probe failed at address 0x%x\n",
CLK_SYNTHESIZER_I2C_ADDR);
CONFIG_CLK_SYNTHESIZER_I2C_ADDR);
return rc;
}
#else
rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
rc = i2c_get_chip_for_busnum(0, CONFIG_CLK_SYNTHESIZER_I2C_ADDR, 1, &dev);
if (rc) {
printf("failed to get device for synthesizer at address 0x%x\n",
CLK_SYNTHESIZER_I2C_ADDR);
CONFIG_CLK_SYNTHESIZER_I2C_ADDR);
return rc;
}
#endif

2
arch/arm/mach-socfpga/Kconfig
View File

@ -248,6 +248,4 @@ config SYS_CONFIG_NAME
default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
default "socfpga_vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA
source "board/keymile/Kconfig"
endif

8
arch/m68k/Kconfig
View File

@ -113,6 +113,10 @@ config M54418
bool
select MCF5441x
# peripherals
config CF_DSPI
bool
choice
prompt "Target select"
optional
@ -176,6 +180,7 @@ config TARGET_AMCORE
config TARGET_STMARK2
bool "Support stmark2"
select CF_DSPI
select M54418
endchoice
@ -196,4 +201,7 @@ source "board/freescale/m5373evb/Kconfig"
source "board/sysam/amcore/Kconfig"
source "board/sysam/stmark2/Kconfig"
config MCFTMR
bool "Use DMA timer"
endmenu

4
arch/m68k/include/asm/immap.h
View File

@ -225,8 +225,6 @@
#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1)
#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000))
#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
/* Timer */
#ifdef CONFIG_MCFTMR
#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0)
@ -249,7 +247,6 @@
#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC)
#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000))
#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
/* Timer */
#ifdef CONFIG_MCFTMR
@ -283,7 +280,6 @@
#endif
#define MMAP_DSPI MMAP_DSPI0
#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC)
/* Timer */
#ifdef CONFIG_MCFTMR

4
arch/powerpc/cpu/mpc83xx/Kconfig
View File

@ -1,6 +1,9 @@
menu "mpc83xx CPU"
depends on MPC83xx
config E300
def_bool y
config SYS_CPU
default "mpc83xx"
@ -200,7 +203,6 @@ config FSL_ELBC
source "board/freescale/mpc837xerdb/Kconfig"
source "board/ids/ids8313/Kconfig"
source "board/keymile/Kconfig"
source "board/gdsys/mpc8308/Kconfig"
endmenu

7
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@ -653,6 +653,7 @@ config ARCH_T1024
bool
select BACKSIDE_L2_CACHE
select E500MC
select E5500
select FSL_LAW
select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
@ -677,6 +678,7 @@ config ARCH_T1040
bool
select BACKSIDE_L2_CACHE
select E500MC
select E5500
select FSL_LAW
select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
@ -701,6 +703,7 @@ config ARCH_T1042
bool
select BACKSIDE_L2_CACHE
select E500MC
select E5500
select FSL_LAW
select SYS_CACHE_SHIFT_6
select SYS_FSL_DDR_VER_50
@ -805,6 +808,9 @@ config E500MC
help
Enble PowerPC E500MC core
config E5500
bool
config E6500
bool
select BTB
@ -1193,7 +1199,6 @@ source "board/freescale/t104xrdb/Kconfig"
source "board/freescale/t208xqds/Kconfig"
source "board/freescale/t208xrdb/Kconfig"
source "board/freescale/t4rdb/Kconfig"
source "board/keymile/Kconfig"
source "board/socrates/Kconfig"
endmenu

34
arch/powerpc/cpu/mpc85xx/start.S
View File

@ -247,7 +247,7 @@ l2_disabled:
/* Interrupt vectors do not fit in minimal SPL. */
#if !defined(MINIMAL_SPL)
/* Setup interrupt vectors */
lis r1,CONFIG_SYS_MONITOR_BASE@h
lis r1,CONFIG_VAL(SYS_MONITOR_BASE)@h
mtspr IVPR,r1
li r4,CriticalInput@l
@ -450,7 +450,7 @@ nexti: mflr r1 /* R1 = our PC */
*/
create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
0, BOOKE_PAGESZ_4M, \
CONFIG_SYS_MONITOR_BASE & 0xffc00000, MAS2_I|MAS2_G, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xffc00000, MAS2_I|MAS2_G, \
0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
@ -461,8 +461,8 @@ nexti: mflr r1 /* R1 = our PC */
*/
create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \
0, BOOKE_PAGESZ_256K, \
CONFIG_SYS_MONITOR_BASE & 0xfffc0000, MAS2_I, \
CONFIG_SYS_MONITOR_BASE & 0xfffc0000, MAS3_SX|MAS3_SW|MAS3_SR, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfffc0000, MAS2_I, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfffc0000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
#endif
#endif
@ -1027,7 +1027,7 @@ create_init_ram_area:
/* create a temp mapping in AS=1 to the 4M boot window */
create_tlb1_entry 15, \
1, BOOKE_PAGESZ_4M, \
CONFIG_SYS_MONITOR_BASE & 0xffc00000, MAS2_I|MAS2_G, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xffc00000, MAS2_I|MAS2_G, \
0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
@ -1037,7 +1037,7 @@ create_init_ram_area:
*/
create_tlb1_entry 15, \
1, BOOKE_PAGESZ_1M, \
CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_SYS_PBI_FLASH_WINDOW & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
@ -1048,24 +1048,24 @@ create_init_ram_area:
*/
#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
/* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE
/* create a temp mapping in AS = 1 for mapping CONFIG_VAL(SYS_MONITOR_BASE)
* to L3 Address configured by PBL for ISBC code
*/
create_tlb1_entry 15, \
1, BOOKE_PAGESZ_1M, \
CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_SYS_INIT_L3_ADDR & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
#else
/*
* create a temp mapping in AS=1 to the 1M CONFIG_SYS_MONITOR_BASE space, the main
* image has been relocated to CONFIG_SYS_MONITOR_BASE on the second stage.
* create a temp mapping in AS=1 to the 1M CONFIG_VAL(SYS_MONITOR_BASE) space, the main
* image has been relocated to CONFIG_VAL(SYS_MONITOR_BASE) on the second stage.
*/
create_tlb1_entry 15, \
1, BOOKE_PAGESZ_1M, \
CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \
CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \
0, r6
#endif
@ -1126,8 +1126,8 @@ switch_as:
#else
/* Calculate absolute address in FLASH and jump there */
/*--------------------------------------------------------------*/
lis r3,CONFIG_SYS_MONITOR_BASE@h
ori r3,r3,CONFIG_SYS_MONITOR_BASE@l
lis r3,CONFIG_VAL(SYS_MONITOR_BASE)@h
ori r3,r3,CONFIG_VAL(SYS_MONITOR_BASE)@l
addi r3,r3,_start_cont - _start
mtlr r3
blr
@ -1530,8 +1530,8 @@ relocate_code:
GET_GOT
#ifndef CONFIG_SPL_SKIP_RELOCATE
mr r3,r5 /* Destination Address */
lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */
ori r4,r4,CONFIG_SYS_MONITOR_BASE@l
lis r4,CONFIG_VAL(SYS_MONITOR_BASE)@h /* Source Address */
ori r4,r4,CONFIG_VAL(SYS_MONITOR_BASE)@l
lwz r5,GOT(__init_end)
sub r5,r5,r4
li r6,CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
@ -1539,7 +1539,7 @@ relocate_code:
/*
* Fix GOT pointer:
*
* New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
* New GOT-PTR = (old GOT-PTR - CONFIG_VAL(SYS_MONITOR_BASE)) + Destination Address
*
* Offset:
*/

2
arch/powerpc/include/asm/config_mpc85xx.h
View File

@ -270,7 +270,6 @@
#endif
#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
#define CONFIG_E5500
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
@ -299,7 +298,6 @@
#define CONFIG_SYS_FSL_SFP_VER_3_0
#elif defined(CONFIG_ARCH_T1024)
#define CONFIG_E5500
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */

3
board/atmel/at91sam9263ek/Kconfig
View File

@ -9,4 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "at91sam9263ek"
config SYS_USE_NORFLASH
bool "Use the NOR flash on the platform"
endif

11
board/buffalo/lsxl/Kconfig
View File

@ -9,4 +9,15 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "lsxl"
choice
prompt "Board model"
config LSCHLV2
bool "LSCHLV2 support"
config LSXHL
bool "LSXHL support"
endchoice
endif

7
board/freescale/common/Kconfig
View File

@ -22,6 +22,13 @@ config CMD_ESBC_VALIDATE
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)
config DEEP_SLEEP
bool "Enable SoC deep sleep feature"
default y if ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
help
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
config FSL_USE_PCA9547_MUX
bool "Enable PCA9547 I2C Mux on Freescale boards"
help

6
board/freescale/common/cds_via.c
View File

@ -28,7 +28,11 @@ void mpc85xx_config_via(struct pci_controller *hose,
* This allows legacy I/O (i8259, etc) on the VIA
* southbridge to be accessed.
*/
bridge = PCI_BDF(0,BRIDGE_ID,0);
#ifdef CONFIG_TARGET_MPC8548CDS_LEGACY
bridge = PCI_BDF(0, 17, 0);
#else
bridge = PCI_BDF(0, 28, 0);
#endif
pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0);
pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0);
pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10);

3
board/freescale/m5235evb/Kconfig
View File

@ -12,4 +12,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "M5235EVB"
config NORFLASH_PS32BIT
bool "Board has 32bit CFI flash"
endif

3
board/freescale/mpc837xerdb/Kconfig
View File

@ -1,5 +1,8 @@
if TARGET_MPC837XERDB
config PCIE
def_bool y
config SYS_BOARD
default "mpc837xerdb"

3
board/freescale/mpc8548cds/Kconfig
View File

@ -9,4 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "MPC8548CDS"
config TARGET_MPC8548CDS_LEGACY
bool "Legacy platform support"
endif

3
board/freescale/mx53loco/Kconfig
View File

@ -1,5 +1,8 @@
if TARGET_MX53LOCO
config DIALOG_POWER
def_bool y
config SYS_BOARD
default "mx53loco"

11
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
View File

@ -160,6 +160,14 @@ int board_early_init_f(void)
return 0;
}
#if defined(CONFIG_TARGET_P1020RDB_PC)
#define BOARD_NAME "P1020RDB-PC"
#elif defined(CONFIG_TARGET_P1020RDB_PD)
#define BOARD_NAME "P1020RDB-PD"
#elif defined(CONFIG_TARGET_P2020RDB)
#define BOARD_NAME "P2020RDB-PC"
#endif
int checkboard(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
@ -167,7 +175,8 @@ int checkboard(void)
u8 in, out, io_config, val;
int bus_num = CONFIG_SYS_SPD_BUS_NUM;
printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,
/* FIXME: This should just use the model from the device tree or similar */
printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", BOARD_NAME,
in_8(&cpld_data->cpld_rev_major) & 0x0F,
in_8(&cpld_data->cpld_rev_minor) & 0x0F,
in_8(&cpld_data->pcba_rev) & 0x0F);

3
board/freescale/t208xqds/Kconfig
View File

@ -9,6 +9,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "T208xQDS"
config SRIO_PCIE_BOOT_SLAVE
bool "Boot as a SRIO PCIe slave device"
source "board/freescale/common/Kconfig"
endif

2
board/ge/bx50v3/bx50v3.c
View File

@ -547,7 +547,7 @@ int last_stage_init(void)
int checkboard(void)
{
printf("BOARD: %s\n", CONFIG_BOARD_NAME);
printf("BOARD: General Electric Bx50v3\n");
return 0;
}

2
board/keymile/common/ivm.c
View File

@ -306,7 +306,7 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset)
return 0;
page2 = &buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2];
if (IS_ENABLED(CONFIG_KMTEGR1)) {
if (IS_ENABLED(CONFIG_TARGET_KMTEGR1)) {
/* KMTEGR1 has a special setup. eth0 has no connection to the
* outside and gets an locally administred MAC address, eth1 is
* the debug interface and gets the official MAC address from

23
board/keymile/km_arm/Kconfig
View File

@ -60,4 +60,27 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply FS_CRAMFS
imply CMD_USB
choice
prompt "Board model"
config KM_COGE5UN
bool "Hitachi Power Grids COGE5UN"
config KM_KIRKWOOD_128M16
bool "Hitachi Power Grids Kirkwood 128M16"
config KM_KIRKWOOD
bool "Hitachi Power Grids Kirkwood"
config KM_KIRKWOOD_PCI
bool "Hitachi Power Grids Kirkwood PCI"
config KM_NUSA
bool "Hitachi Power Grids Kirkwood (NUSA)"
config KM_SUSE2
bool "Hitachi Power Grids Kirkwood (SUSE2)"
endchoice
endif

7
board/sysam/stmark2/Kconfig
View File

@ -1,5 +1,12 @@
if TARGET_STMARK2
config CF_SBF
def_bool y
config SYS_INPUT_CLKSRC
hex
default 30000000
config SYS_CPU
default "mcf5445x"

52
boot/Kconfig
View File

@ -339,19 +339,6 @@ config OF_STDOUT_VIA_ALIAS
incorrect when used with device tree as this option does not
exist / should not be used.
config SYS_EXTRA_OPTIONS
string "Extra Options (DEPRECATED)"
help
The old configuration infrastructure (= mkconfig + boards.cfg)
provided the extra options field. If you have something like
"HAS_BAR,BAZ=64", the optional options
#define CONFIG_HAS
#define CONFIG_BAZ 64
will be defined in include/config.h.
This option was prepared for the smooth migration from the old
configuration to Kconfig. Since this option will be removed sometime,
new boards should not use this option.
config HAVE_SYS_TEXT_BASE
bool
depends on !NIOS2 && !XTENSA
@ -370,6 +357,31 @@ config SYS_TEXT_BASE
help
The address in memory that U-Boot will be running from, initially.
config HAVE_SYS_MONITOR_BASE
bool
depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \
|| FLASH_PIC32 || ENV_IS_IN_FLASH || MTD_NOR_FLASH
depends on !EFI_APP
default y
config SYS_MONITOR_BASE
depends on HAVE_SYS_MONITOR_BASE
hex "Physical start address of boot monitor code"
default SYS_TEXT_BASE
help
The physical start address of boot monitor code (which is the same as
CONFIG_SYS_TEXT_BASE when linking) and the same as CONFIG_SYS_FLASH_BASE
when booting from flash.
config SPL_SYS_MONITOR_BASE
depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE
hex "Physical start address of SPL monitor code"
default SPL_TEXT_BASE
config TPL_SYS_MONITOR_BASE
depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE
hex "Physical start address of TPL monitor code"
config DYNAMIC_SYS_CLK_FREQ
bool "Determine CPU clock frequency at run-time"
help
@ -423,6 +435,20 @@ config RAMBOOT_PBL
Some SoCs use PBL to load RCW and/or pre-initialization instructions.
For more details refer to doc/README.pblimage
choice
prompt "Freescale PBL load location"
depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
|| TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) \
&& !CMD_NAND)
config SDCARD
bool "Freescale PBL is found on SD card"
config SPIFLASH
bool "Freescale PBL is found on SPI flash"
endchoice
config SYS_FSL_PBL_PBI
string "PBI(pre-boot instructions) commands for the PBL image"
depends on RAMBOOT_PBL

4
common/Kconfig
View File

@ -571,6 +571,10 @@ config BOARD_LATE_INIT
So this config enable the late init code with the help of board_late_init
function which should defined on respective boards.
config CLOCKS
bool "Call set_cpu_clk_info"
depends on ARM
config SYS_FSL_CLK
bool
depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || \

1
configs/10m50_defconfig
View File

@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard"
CONFIG_SYS_LOAD_ADDR=0xcc000000
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0xCFF80000
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y

1
configs/3c120_defconfig
View File

@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard"
CONFIG_SYS_LOAD_ADDR=0xd4000000
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0xD7F80000
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y

4
configs/M5208EVBE_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
CONFIG_TARGET_M5208EVBE=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_MONITOR_BASE=0x00000400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@ -21,8 +23,8 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x2000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_UDP_CHECKSUM=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x58000

4
configs/M5235EVB_Flash32_defconfig
View File

@ -5,8 +5,10 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32"
CONFIG_TARGET_M5235EVB=y
CONFIG_NORFLASH_PS32BIT=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
CONFIG_SYS_MONITOR_BASE=0xFFC00400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set

2
configs/M5235EVB_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
CONFIG_TARGET_M5235EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set

2
configs/M5249EVB_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
CONFIG_TARGET_M5249EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x200000
CONFIG_SYS_MONITOR_BASE=0xFFE00400
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_DEVICE_NULLDEV=y

2
configs/M5253DEMO_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
CONFIG_TARGET_M5253DEMO=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_SYS_MONITOR_BASE=0xFF800400
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set

2
configs/M5272C3_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
CONFIG_TARGET_M5272C3=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set

2
configs/M5275EVB_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
CONFIG_TARGET_M5275EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootm ffe40000"

2
configs/M5282EVB_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
CONFIG_TARGET_M5282EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set

6
configs/M53017EVB_defconfig
View File

@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x8000
CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
CONFIG_TARGET_M53017EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_MONITOR_BASE=0x00000400
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
@ -23,8 +25,8 @@ CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x40000
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_UDP_CHECKSUM=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x58000
@ -38,4 +40,6 @@ CONFIG_SYS_FLASH_CFI=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y

9
configs/M5329AFEE_defconfig
View File

@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
CONFIG_TARGET_M5329EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
CONFIG_SYS_MONITOR_BASE=0x00000400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@ -14,7 +15,6 @@ CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
@ -24,8 +24,8 @@ CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_UDP_CHECKSUM=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x58000
@ -36,8 +36,9 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MTD_RAW_NAND=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y

7
configs/M5329BFEE_defconfig
View File

@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
CONFIG_TARGET_M5329EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_SYS_MONITOR_BASE=0x00000400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@ -24,8 +25,8 @@ CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_UDP_CHECKSUM=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x58000
@ -40,4 +41,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y

7
configs/M5373EVB_defconfig
View File

@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
CONFIG_TARGET_M5373EVB=y
CONFIG_MCFTMR=y
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
CONFIG_SYS_MONITOR_BASE=0x00000400
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMDLINE_EDITING is not set
@ -24,8 +25,8 @@ CONFIG_CMD_DATE=y
CONFIG_ENV_ADDR=0x4000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_UDP_CHECKSUM=y
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x58000
@ -40,4 +41,6 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_DM_ETH=y
CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y

1
configs/MCR3000_defconfig
View File

@ -18,6 +18,7 @@ CONFIG_SYS_SCCR_MASK=0x60000000
CONFIG_SYS_DER=0x2002000F
CONFIG_SYS_LOAD_ADDR=0x200000
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MONITOR_BASE=0x04000000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="\nEnter password - autoboot in %d sec...\n"

1
configs/MPC837XERDB_defconfig
View File

@ -147,7 +147,6 @@ CONFIG_LCRR_DBYP_PLL_BYPASSED=y
CONFIG_LCRR_CLKDIV_8=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
CONFIG_BOOTDELAY=6
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y

2
configs/MPC8548CDS_legacy_defconfig
View File

@ -8,9 +8,9 @@ CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_TARGET_MPC8548CDS_LEGACY=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y

1
configs/P1010RDB-PA_36BIT_NAND_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
View File

@ -18,7 +18,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

2
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
View File

@ -20,7 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PA_NAND_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PA_SDCARD_defconfig
View File

@ -17,7 +17,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

2
configs/P1010RDB-PA_SPIFLASH_defconfig
View File

@ -19,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PB_36BIT_NAND_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
View File

@ -18,7 +18,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

2
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
View File

@ -20,7 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PB_NAND_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1010RDB-PB_SDCARD_defconfig
View File

@ -17,7 +17,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

2
configs/P1010RDB-PB_SPIFLASH_defconfig
View File

@ -19,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"

1
configs/P1020RDB-PC_36BIT_NAND_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

2
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
View File

@ -19,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

3
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
View File

@ -21,7 +21,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

1
configs/P1020RDB-PC_NAND_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

2
configs/P1020RDB-PC_SDCARD_defconfig
View File

@ -18,7 +18,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

3
configs/P1020RDB-PC_SPIFLASH_defconfig
View File

@ -20,7 +20,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

1
configs/P1020RDB-PD_NAND_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

2
configs/P1020RDB-PD_SDCARD_defconfig
View File

@ -18,7 +18,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

3
configs/P1020RDB-PD_SPIFLASH_defconfig
View File

@ -20,7 +20,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

1
configs/P2020RDB-PC_36BIT_NAND_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

2
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
View File

@ -19,7 +19,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

3
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
View File

@ -21,7 +21,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

1
configs/P2020RDB-PC_NAND_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

2
configs/P2020RDB-PC_SDCARD_defconfig
View File

@ -18,7 +18,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

3
configs/P2020RDB-PC_SPIFLASH_defconfig
View File

@ -20,7 +20,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000
CONFIG_SPIFLASH=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"

1
configs/P2041RDB_SDCARD_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"

2
configs/P2041RDB_SPIFLASH_defconfig
View File

@ -13,9 +13,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg"
CONFIG_BOOTDELAY=10

1
configs/P3041DS_SDCARD_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"

2
configs/P3041DS_SPIFLASH_defconfig
View File

@ -13,9 +13,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg"
CONFIG_BOOTDELAY=10

1
configs/P4080DS_SDCARD_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"

2
configs/P4080DS_SPIFLASH_defconfig
View File

@ -13,9 +13,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg"
CONFIG_BOOTDELAY=10

1
configs/P5040DS_SDCARD_defconfig
View File

@ -12,7 +12,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"

2
configs/P5040DS_SPIFLASH_defconfig
View File

@ -13,9 +13,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg"
CONFIG_BOOTDELAY=10

4
configs/T1024RDB_NAND_defconfig
View File

@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
@ -14,6 +12,8 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_MP=y

5
configs/T1024RDB_SDCARD_defconfig
View File

@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
@ -15,12 +13,13 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_sd_rcw.cfg"

6
configs/T1024RDB_SPIFLASH_defconfig
View File

@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
@ -17,13 +15,15 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_spi_rcw.cfg"
CONFIG_BOOTDELAY=10

4
configs/T1024RDB_defconfig
View File

@ -1,14 +1,14 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t1024rdb"
CONFIG_MPC85xx=y
CONFIG_TARGET_T1024RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y

1
configs/T1042D4RDB_SDCARD_defconfig
View File

@ -17,7 +17,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg"

2
configs/T1042D4RDB_SPIFLASH_defconfig
View File

@ -19,8 +19,8 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg"
CONFIG_BOOTDELAY=10

1
configs/T2080QDS_SDCARD_defconfig
View File

@ -22,7 +22,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"

2
configs/T2080QDS_SPIFLASH_defconfig
View File

@ -24,9 +24,9 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg"
CONFIG_BOOTDELAY=10

2
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
View File

@ -10,12 +10,12 @@ CONFIG_VOL_MONITOR_IR36021_SET=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_SRIO_PCIE_BOOT_SLAVE=y
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE"
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y

4
configs/T2080RDB_NAND_defconfig
View File

@ -2,8 +2,6 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x00201000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
@ -17,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_MP=y

5
configs/T2080RDB_SDCARD_defconfig
View File

@ -2,8 +2,6 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x00201000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
@ -18,12 +16,13 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg"

6
configs/T2080RDB_SPIFLASH_defconfig
View File

@ -2,8 +2,6 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x00201000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
@ -20,13 +18,15 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_RAMBOOT_PBL=y
CONFIG_SPIFLASH=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg"
CONFIG_BOOTDELAY=10

4
configs/T2080RDB_defconfig
View File

@ -1,7 +1,5 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
@ -12,6 +10,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y

4
configs/T2080RDB_revD_NAND_defconfig
View File

@ -2,8 +2,6 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x00201000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
@ -18,6 +16,8 @@ CONFIG_SPL=y
CONFIG_MPC85xx=y
CONFIG_TARGET_T2080RDB=y
CONFIG_T2080RDB_REV_D=y
CONFIG_SYS_MEMTEST_START=0x00200000
CONFIG_SYS_MEMTEST_END=0x00400000
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
CONFIG_MP=y

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