net: mii: Use spatch to update miiphy_register
Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
parent
63d985985e
commit
5a49f17481
@ -73,9 +73,9 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
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#define MAX_WAIT 1000
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#if defined(CONFIG_CMD_MII)
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int au1x00_miiphy_read(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short * value)
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int au1x00_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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unsigned short value = 0;
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volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
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volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
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u32 mii_control;
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@ -102,12 +102,12 @@ int au1x00_miiphy_read(const char *devname, unsigned char addr,
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return -1;
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}
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}
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*value = *mii_data_reg;
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return 0;
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value = *mii_data_reg;
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return value;
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}
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int au1x00_miiphy_write(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value)
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int au1x00_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 value)
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{
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volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
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volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
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@ -290,8 +290,17 @@ int au1x00_enet_initialize(bd_t *bis){
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eth_register(dev);
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#if defined(CONFIG_CMD_MII)
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miiphy_register(dev->name,
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au1x00_miiphy_read, au1x00_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
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mdiodev->read = au1x00_miiphy_read;
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mdiodev->write = au1x00_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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#endif
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return 1;
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@ -379,8 +379,17 @@ int fec_initialize(bd_t *bis)
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#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
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&& defined(CONFIG_BITBANGMII)
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miiphy_register(dev->name,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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#endif
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}
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@ -441,8 +441,17 @@ int fec_initialize(bd_t *bis)
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#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
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&& defined(CONFIG_BITBANGMII)
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miiphy_register(dev->name,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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#endif
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}
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@ -47,10 +47,9 @@ DECLARE_GLOBAL_DATA_PTR;
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static int mii_discover_phy(struct eth_device *dev);
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#endif
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int fec8xx_miiphy_read(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value);
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int fec8xx_miiphy_write(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value);
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int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
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int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 value);
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static struct ether_fcc_info_s
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{
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@ -170,8 +169,17 @@ int fec_initialize(bd_t *bis)
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eth_register(dev);
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
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miiphy_register(dev->name,
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fec8xx_miiphy_read, fec8xx_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
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mdiodev->read = fec8xx_miiphy_read;
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mdiodev->write = fec8xx_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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#endif
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}
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return 1;
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@ -894,9 +902,9 @@ void mii_init (void)
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* Otherwise they hang in mii_send() !!! Sorry!
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*****************************************************************************/
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int fec8xx_miiphy_read(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value)
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int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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unsigned short value = 0;
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short rdreg; /* register working value */
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#ifdef MII_DEBUG
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@ -904,15 +912,15 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr,
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#endif
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rdreg = mii_send(mk_mii_read(addr, reg));
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*value = rdreg;
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value = rdreg;
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#ifdef MII_DEBUG
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printf ("0x%04x\n", *value);
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printf ("0x%04x\n", value);
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#endif
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return 0;
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return value;
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}
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int fec8xx_miiphy_write(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value)
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int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 value)
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{
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#ifdef MII_DEBUG
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printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
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@ -172,8 +172,17 @@ int last_stage_init(void)
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print_fpga_info();
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miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (k = 0; k < 32; ++k)
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configure_gbit_phy(k);
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@ -405,8 +405,17 @@ int last_stage_init(void)
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}
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if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
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miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
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bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
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if ((mux_ch == 1) && !ch0_rgmii2_present)
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continue;
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@ -437,8 +446,18 @@ int last_stage_init(void)
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print_fpga_info(k, false);
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osd_probe(k);
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if (feature_carrier_speed == CARRIER_SPEED_1G) {
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miiphy_register(bb_miiphy_buses[k].name,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[k].name,
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MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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setup_88e1518(bb_miiphy_buses[k].name, 0);
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}
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}
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@ -246,8 +246,17 @@ int last_stage_init(void)
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/* setup Gbit PHYs */
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puts("TRANS: ");
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puts(str_phys);
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miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (k = 0; k < 32; ++k) {
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configure_gbit_phy(CONFIG_SYS_GBIT_MII_BUSNAME, k);
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@ -255,8 +264,17 @@ int last_stage_init(void)
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putc(slash[k % 8]);
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}
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miiphy_register(CONFIG_SYS_GBIT_MII1_BUSNAME,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII1_BUSNAME, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (k = 0; k < 32; ++k) {
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configure_gbit_phy(CONFIG_SYS_GBIT_MII1_BUSNAME, k);
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@ -162,8 +162,17 @@ int last_stage_init(void)
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}
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if (hw_type_cat) {
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miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
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bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
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if ((mux_ch == 1) && !ch0_rgmii2_present)
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continue;
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@ -199,8 +208,18 @@ int last_stage_init(void)
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osd_probe(k + 4);
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#endif
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if (hw_type_cat) {
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miiphy_register(bb_miiphy_buses[k].name,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[k].name,
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MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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setup_88e1514(bb_miiphy_buses[k].name, 0);
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}
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}
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@ -179,8 +179,17 @@ int last_stage_init(void)
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}
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if (hw_type_cat) {
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miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
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bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
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if ((mux_ch == 1) && !ch0_sgmii2_present)
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continue;
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@ -252,8 +261,18 @@ int last_stage_init(void)
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dp501_probe(k, false);
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#endif
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if (hw_type_cat) {
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miiphy_register(bb_miiphy_buses[k].name,
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bb_miiphy_read, bb_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, bb_miiphy_buses[k].name,
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MDIO_NAME_LEN);
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mdiodev->read = bb_miiphy_read;
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mdiodev->write = bb_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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setup_88e1514(bb_miiphy_buses[k].name, 0);
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}
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}
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@ -2015,8 +2015,17 @@ int ppc_4xx_eth_initialize (bd_t * bis)
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eth_register(dev);
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
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miiphy_register(dev->name,
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emac4xx_miiphy_read, emac4xx_miiphy_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
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return -ENOMEM;
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strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
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mdiodev->read = emac4xx_miiphy_read;
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mdiodev->write = emac4xx_miiphy_write;
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retval = mdio_register(mdiodev);
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if (retval < 0)
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return retval;
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#endif
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if (0 == virgin) {
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@ -57,18 +57,19 @@ static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond)
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return !timeout;
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}
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static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
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u16 *value)
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static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad,
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int phy_reg)
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{
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struct eth_device *dev = eth_get_dev_by_name(devname);
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u16 value = 0;
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struct eth_device *dev = eth_get_dev_by_name(bus->name);
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struct armdfec_device *darmdfec = to_darmdfec(dev);
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struct armdfec_reg *regs = darmdfec->regs;
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u32 val;
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if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) {
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val = readl(®s->phyadr);
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*value = val & 0x1f;
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return 0;
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value = val & 0x1f;
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return value;
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}
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/* check parameters */
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@ -99,15 +100,15 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
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return -1;
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}
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val = readl(®s->smi);
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*value = val & 0xffff;
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value = val & 0xffff;
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return 0;
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return value;
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}
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static int smi_reg_write(const char *devname,
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u8 phy_addr, u8 phy_reg, u16 value)
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static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad,
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int phy_reg, u16 value)
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{
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struct eth_device *dev = eth_get_dev_by_name(devname);
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struct eth_device *dev = eth_get_dev_by_name(bus->name);
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struct armdfec_device *darmdfec = to_darmdfec(dev);
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struct armdfec_reg *regs = darmdfec->regs;
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@ -711,7 +712,17 @@ int armada100_fec_register(unsigned long base_addr)
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eth_register(dev);
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
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miiphy_register(dev->name, smi_reg_read, smi_reg_write);
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int retval;
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struct mii_dev *mdiodev = mdio_alloc();
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if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = smi_reg_read;
|
||||
mdiodev->write = smi_reg_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
|
@ -159,23 +159,23 @@ at91_emac_t *get_emacbase_by_name(const char *devname)
|
||||
return (at91_emac_t *) netdev->iobase;
|
||||
}
|
||||
|
||||
int at91emac_mii_read(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short *value)
|
||||
int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)
|
||||
{
|
||||
unsigned short value = 0;
|
||||
at91_emac_t *emac;
|
||||
|
||||
emac = get_emacbase_by_name(devname);
|
||||
at91emac_read(emac , addr, reg, value);
|
||||
return 0;
|
||||
emac = get_emacbase_by_name(bus->name);
|
||||
at91emac_read(emac , addr, reg, &value);
|
||||
return value;
|
||||
}
|
||||
|
||||
|
||||
int at91emac_mii_write(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short value)
|
||||
int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,
|
||||
u16 value)
|
||||
{
|
||||
at91_emac_t *emac;
|
||||
|
||||
emac = get_emacbase_by_name(devname);
|
||||
emac = get_emacbase_by_name(bus->name);
|
||||
at91emac_write(emac, addr, reg, value);
|
||||
return 0;
|
||||
}
|
||||
@ -502,7 +502,17 @@ int at91emac_register(bd_t *bis, unsigned long iobase)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, at91emac_mii_read, at91emac_mii_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = at91emac_mii_read;
|
||||
mdiodev->write = at91emac_mii_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
|
@ -72,18 +72,20 @@ static int bfin_miiphy_wait(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
|
||||
static int bfin_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
|
||||
{
|
||||
ushort val = 0;
|
||||
if (bfin_miiphy_wait())
|
||||
return 1;
|
||||
bfin_write_EMAC_STAADD(SET_PHYAD(addr) | SET_REGAD(reg) | STABUSY);
|
||||
if (bfin_miiphy_wait())
|
||||
return 1;
|
||||
*val = bfin_read_EMAC_STADAT();
|
||||
return 0;
|
||||
val = bfin_read_EMAC_STADAT();
|
||||
return val;
|
||||
}
|
||||
|
||||
static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
|
||||
static int bfin_miiphy_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 val)
|
||||
{
|
||||
if (bfin_miiphy_wait())
|
||||
return 1;
|
||||
@ -113,7 +115,17 @@ int bfin_EMAC_initialize(bd_t *bis)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, bfin_miiphy_read, bfin_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = bfin_miiphy_read;
|
||||
mdiodev->write = bfin_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
@ -390,12 +390,18 @@ static int gen_auto_negotiate(int phy_addr)
|
||||
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
|
||||
static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad,
|
||||
int reg)
|
||||
{
|
||||
return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
|
||||
unsigned short value = 0;
|
||||
int retval = (davinci_eth_phy_read(addr, reg, &value) ? 0 : 1);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
return value;
|
||||
}
|
||||
|
||||
static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
|
||||
static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 value)
|
||||
{
|
||||
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
|
||||
}
|
||||
@ -883,8 +889,17 @@ int davinci_emac_initialize(void)
|
||||
|
||||
debug("Ethernet PHY: %s\n", phy[i].name);
|
||||
|
||||
miiphy_register(phy[i].name, davinci_mii_phy_read,
|
||||
davinci_mii_phy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, phy[i].name, MDIO_NAME_LEN);
|
||||
mdiodev->read = davinci_mii_phy_read;
|
||||
mdiodev->write = davinci_mii_phy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
|
||||
|
@ -334,34 +334,35 @@ static struct eth_device* verify_phyaddr (const char *devname,
|
||||
return dev;
|
||||
}
|
||||
|
||||
static int eepro100_miiphy_read(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short *value)
|
||||
static int eepro100_miiphy_read(struct mii_dev *bus, int addr, int devad,
|
||||
int reg)
|
||||
{
|
||||
unsigned short value = 0;
|
||||
struct eth_device *dev;
|
||||
|
||||
dev = verify_phyaddr(devname, addr);
|
||||
dev = verify_phyaddr(bus->name, addr);
|
||||
if (dev == NULL)
|
||||
return -1;
|
||||
|
||||
if (get_phyreg(dev, addr, reg, value) != 0) {
|
||||
printf("%s: mii read timeout!\n", devname);
|
||||
if (get_phyreg(dev, addr, reg, &value) != 0) {
|
||||
printf("%s: mii read timeout!\n", bus->name);
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return value;
|
||||
}
|
||||
|
||||
static int eepro100_miiphy_write(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short value)
|
||||
static int eepro100_miiphy_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 value)
|
||||
{
|
||||
struct eth_device *dev;
|
||||
|
||||
dev = verify_phyaddr(devname, addr);
|
||||
dev = verify_phyaddr(bus->name, addr);
|
||||
if (dev == NULL)
|
||||
return -1;
|
||||
|
||||
if (set_phyreg(dev, addr, reg, value) != 0) {
|
||||
printf("%s: mii write timeout!\n", devname);
|
||||
printf("%s: mii write timeout!\n", bus->name);
|
||||
return -1;
|
||||
}
|
||||
|
||||
@ -451,8 +452,17 @@ int eepro100_initialize (bd_t * bis)
|
||||
|
||||
#if defined (CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
/* register mii command access routines */
|
||||
miiphy_register(dev->name,
|
||||
eepro100_miiphy_read, eepro100_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = eepro100_miiphy_read;
|
||||
mdiodev->write = eepro100_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
card_number++;
|
||||
|
@ -742,9 +742,10 @@ static int enc_initcheck(enc_dev_t *enc, const enum enc_initstate requiredstate)
|
||||
*
|
||||
* This function is registered with miiphy_register().
|
||||
*/
|
||||
int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
|
||||
int enc_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
u16 value = 0;
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
enc_dev_t *enc;
|
||||
|
||||
if (!dev || phy_adr != 0)
|
||||
@ -757,9 +758,9 @@ int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
|
||||
enc_release_bus(enc);
|
||||
return -1;
|
||||
}
|
||||
*value = enc_phy_read(enc, reg);
|
||||
value = enc_phy_read(enc, reg);
|
||||
enc_release_bus(enc);
|
||||
return 0;
|
||||
return value;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -767,9 +768,10 @@ int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
|
||||
*
|
||||
* This function is registered with miiphy_register().
|
||||
*/
|
||||
int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
|
||||
int enc_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,
|
||||
u16 value)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
enc_dev_t *enc;
|
||||
|
||||
if (!dev || phy_adr != 0)
|
||||
@ -958,7 +960,17 @@ int enc28j60_initialize(unsigned int bus, unsigned int cs,
|
||||
sprintf(dev->name, "enc%i.%i", bus, cs);
|
||||
eth_register(dev);
|
||||
#if defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, enc_miiphy_read, enc_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = enc_miiphy_read;
|
||||
mdiodev->write = enc_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
@ -30,10 +30,10 @@
|
||||
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
|
||||
|
||||
/* ep93xx_miiphy ops forward declarations */
|
||||
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
|
||||
unsigned char const reg, unsigned short * const value);
|
||||
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
|
||||
unsigned char const reg, unsigned short const value);
|
||||
static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad,
|
||||
int reg);
|
||||
static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 value);
|
||||
|
||||
#if defined(EP93XX_MAC_DEBUG)
|
||||
/**
|
||||
@ -421,7 +421,17 @@ eth_send_out:
|
||||
#if defined(CONFIG_MII)
|
||||
int ep93xx_miiphy_initialize(bd_t * const bd)
|
||||
{
|
||||
miiphy_register("ep93xx_eth0", ep93xx_miiphy_read, ep93xx_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, "ep93xx_eth0", MDIO_NAME_LEN);
|
||||
mdiodev->read = ep93xx_miiphy_read;
|
||||
mdiodev->write = ep93xx_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
@ -542,9 +552,10 @@ eth_init_done:
|
||||
/**
|
||||
* Read a 16-bit value from an MII register.
|
||||
*/
|
||||
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
|
||||
unsigned char const reg, unsigned short * const value)
|
||||
static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad,
|
||||
int reg)
|
||||
{
|
||||
unsigned short value = 0;
|
||||
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
|
||||
int ret = -1;
|
||||
uint32_t self_ctl;
|
||||
@ -552,10 +563,10 @@ static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
|
||||
debug("+ep93xx_miiphy_read");
|
||||
|
||||
/* Parameter checks */
|
||||
BUG_ON(dev == NULL);
|
||||
BUG_ON(bus->name == NULL);
|
||||
BUG_ON(addr > MII_ADDRESS_MAX);
|
||||
BUG_ON(reg > MII_REGISTER_MAX);
|
||||
BUG_ON(value == NULL);
|
||||
BUG_ON(&value == NULL);
|
||||
|
||||
/*
|
||||
* Save the current SelfCTL register value. Set MAC to suppress
|
||||
@ -579,7 +590,7 @@ static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
|
||||
while (readl(&mac->miists) & MIISTS_BUSY)
|
||||
; /* noop */
|
||||
|
||||
*value = (unsigned short)readl(&mac->miidata);
|
||||
value = (unsigned short)readl(&mac->miidata);
|
||||
|
||||
/* Restore the saved SelfCTL value and return. */
|
||||
writel(self_ctl, &mac->selfctl);
|
||||
@ -588,14 +599,16 @@ static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
|
||||
/* Fall through */
|
||||
|
||||
debug("-ep93xx_miiphy_read");
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* Write a 16-bit value to an MII register.
|
||||
*/
|
||||
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
|
||||
unsigned char const reg, unsigned short const value)
|
||||
static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 value)
|
||||
{
|
||||
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
|
||||
int ret = -1;
|
||||
@ -604,7 +617,7 @@ static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
|
||||
debug("+ep93xx_miiphy_write");
|
||||
|
||||
/* Parameter checks */
|
||||
BUG_ON(dev == NULL);
|
||||
BUG_ON(bus->name == NULL);
|
||||
BUG_ON(addr > MII_ADDRESS_MAX);
|
||||
BUG_ON(reg > MII_REGISTER_MAX);
|
||||
|
||||
|
@ -556,8 +556,17 @@ int mcdmafec_initialize(bd_t * bis)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name,
|
||||
mcffec_miiphy_read, mcffec_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = mcffec_miiphy_read;
|
||||
mdiodev->write = mcffec_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
if (i > 0)
|
||||
|
@ -364,32 +364,35 @@ static int ftmac110_recv(struct eth_device *dev)
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
|
||||
static int ftmac110_mdio_read(
|
||||
const char *devname, uint8_t addr, uint8_t reg, uint16_t *value)
|
||||
static int ftmac110_mdio_read(struct mii_dev *bus, int addr, int devad,
|
||||
int reg)
|
||||
{
|
||||
uint16_t value = 0;
|
||||
int ret = 0;
|
||||
struct eth_device *dev;
|
||||
|
||||
dev = eth_get_dev_by_name(devname);
|
||||
dev = eth_get_dev_by_name(bus->name);
|
||||
if (dev == NULL) {
|
||||
printf("%s: no such device\n", devname);
|
||||
printf("%s: no such device\n", bus->name);
|
||||
ret = -1;
|
||||
} else {
|
||||
*value = mdio_read(dev, addr, reg);
|
||||
value = mdio_read(dev, addr, reg);
|
||||
}
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
return value;
|
||||
}
|
||||
|
||||
static int ftmac110_mdio_write(
|
||||
const char *devname, uint8_t addr, uint8_t reg, uint16_t value)
|
||||
static int ftmac110_mdio_write(struct mii_dev *bus, int addr, int devad,
|
||||
int reg, u16 value)
|
||||
{
|
||||
int ret = 0;
|
||||
struct eth_device *dev;
|
||||
|
||||
dev = eth_get_dev_by_name(devname);
|
||||
dev = eth_get_dev_by_name(bus->name);
|
||||
if (dev == NULL) {
|
||||
printf("%s: no such device\n", devname);
|
||||
printf("%s: no such device\n", bus->name);
|
||||
ret = -1;
|
||||
} else {
|
||||
mdio_write(dev, addr, reg, value);
|
||||
@ -468,7 +471,17 @@ int ftmac110_initialize(bd_t *bis)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = ftmac110_mdio_read;
|
||||
mdiodev->write = ftmac110_mdio_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
card_nr++;
|
||||
|
@ -226,9 +226,11 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
*
|
||||
* Returns 16bit phy register value, or 0xffff on error
|
||||
*/
|
||||
static int mii_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 *data)
|
||||
static int mii_reg_read(struct mii_dev *bus, int phy_adr, int devad,
|
||||
int reg_ofs)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
u16 data = 0;
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct lpc32xx_eth_device *dlpc32xx_eth = to_lpc32xx_eth(dev);
|
||||
struct lpc32xx_eth_registers *regs = dlpc32xx_eth->regs;
|
||||
u32 mind_reg;
|
||||
@ -270,12 +272,12 @@ static int mii_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 *data)
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
*data = (u16) readl(®s->mrdd);
|
||||
data = (u16) readl(®s->mrdd);
|
||||
|
||||
debug("%s:(adr %d, off %d) => %04x\n", __func__, phy_adr,
|
||||
reg_ofs, *data);
|
||||
reg_ofs, data);
|
||||
|
||||
return 0;
|
||||
return data;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -284,9 +286,10 @@ static int mii_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 *data)
|
||||
* Returns 0 if write succeed, -EINVAL on bad parameters
|
||||
* -ETIME on timeout
|
||||
*/
|
||||
static int mii_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
|
||||
static int mii_reg_write(struct mii_dev *bus, int phy_adr, int devad,
|
||||
int reg_ofs, u16 data)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct lpc32xx_eth_device *dlpc32xx_eth = to_lpc32xx_eth(dev);
|
||||
struct lpc32xx_eth_registers *regs = dlpc32xx_eth->regs;
|
||||
u32 mind_reg;
|
||||
@ -645,7 +648,17 @@ int lpc32xx_eth_initialize(bd_t *bis)
|
||||
#if defined(CONFIG_PHYLIB)
|
||||
lpc32xx_eth_phylib_init(dev, CONFIG_PHY_ADDR);
|
||||
#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, mii_reg_read, mii_reg_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = mii_reg_read;
|
||||
mdiodev->write = mii_reg_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
@ -205,39 +205,41 @@ void __weak arch_get_mdio_control(const char *name)
|
||||
|
||||
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
|
||||
|
||||
int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
|
||||
int macb_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)
|
||||
{
|
||||
u16 value = 0;
|
||||
#ifdef CONFIG_DM_ETH
|
||||
struct udevice *dev = eth_get_dev_by_name(devname);
|
||||
struct udevice *dev = eth_get_dev_by_name(bus->name);
|
||||
struct macb_device *macb = dev_get_priv(dev);
|
||||
#else
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct macb_device *macb = to_macb(dev);
|
||||
#endif
|
||||
|
||||
if (macb->phy_addr != phy_adr)
|
||||
return -1;
|
||||
|
||||
arch_get_mdio_control(devname);
|
||||
*value = macb_mdio_read(macb, reg);
|
||||
arch_get_mdio_control(bus->name);
|
||||
value = macb_mdio_read(macb, reg);
|
||||
|
||||
return 0;
|
||||
return value;
|
||||
}
|
||||
|
||||
int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
|
||||
int macb_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,
|
||||
u16 value)
|
||||
{
|
||||
#ifdef CONFIG_DM_ETH
|
||||
struct udevice *dev = eth_get_dev_by_name(devname);
|
||||
struct udevice *dev = eth_get_dev_by_name(bus->name);
|
||||
struct macb_device *macb = dev_get_priv(dev);
|
||||
#else
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct macb_device *macb = to_macb(dev);
|
||||
#endif
|
||||
|
||||
if (macb->phy_addr != phy_adr)
|
||||
return -1;
|
||||
|
||||
arch_get_mdio_control(devname);
|
||||
arch_get_mdio_control(bus->name);
|
||||
macb_mdio_write(macb, reg, value);
|
||||
|
||||
return 0;
|
||||
@ -913,7 +915,17 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
|
||||
eth_register(netdev);
|
||||
|
||||
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
|
||||
miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, netdev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = macb_miiphy_read;
|
||||
mdiodev->write = macb_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
macb->bus = miiphy_get_dev_by_name(netdev->name);
|
||||
#endif
|
||||
return 0;
|
||||
@ -998,7 +1010,17 @@ static int macb_eth_probe(struct udevice *dev)
|
||||
|
||||
_macb_eth_initialize(macb);
|
||||
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
|
||||
miiphy_register(dev->name, macb_miiphy_read, macb_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = macb_miiphy_read;
|
||||
mdiodev->write = macb_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
macb->bus = miiphy_get_dev_by_name(dev->name);
|
||||
#endif
|
||||
|
||||
|
@ -595,8 +595,17 @@ int mcffec_initialize(bd_t * bis)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name,
|
||||
mcffec_miiphy_read, mcffec_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = mcffec_miiphy_read;
|
||||
mdiodev->write = mcffec_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
if (i > 0)
|
||||
fec_info[i - 1].next = &fec_info[i];
|
||||
|
@ -22,8 +22,10 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#error "CONFIG_MII has to be defined!"
|
||||
#endif
|
||||
|
||||
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
|
||||
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
|
||||
int fec512x_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr);
|
||||
int fec512x_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr, u16 data);
|
||||
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
|
||||
|
||||
static uchar rx_buff[FEC_BUFFER_SIZE];
|
||||
@ -639,8 +641,17 @@ int mpc512x_fec_initialize (bd_t * bis)
|
||||
eth_register (dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register (dev->name,
|
||||
fec512x_miiphy_read, fec512x_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = fec512x_miiphy_read;
|
||||
mdiodev->write = fec512x_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
/* Clean up space FEC's MIB and FIFO RAM ...*/
|
||||
@ -670,8 +681,10 @@ int mpc512x_fec_initialize (bd_t * bis)
|
||||
|
||||
/* MII-interface related functions */
|
||||
/********************************************************************/
|
||||
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
|
||||
int fec512x_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr)
|
||||
{
|
||||
u16 retVal = 0;
|
||||
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile fec512x_t *eth = &im->fec;
|
||||
u32 reg; /* convenient holder for the PHY register */
|
||||
@ -711,13 +724,14 @@ int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal
|
||||
/*
|
||||
* it's now safe to read the PHY's register
|
||||
*/
|
||||
*retVal = (u16) in_be32(ð->mii_data);
|
||||
retVal = (u16) in_be32(ð->mii_data);
|
||||
|
||||
return 0;
|
||||
return retVal;
|
||||
}
|
||||
|
||||
/********************************************************************/
|
||||
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
|
||||
int fec512x_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr, u16 data)
|
||||
{
|
||||
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
|
||||
volatile fec512x_t *eth = &im->fec;
|
||||
|
@ -35,8 +35,10 @@ typedef struct {
|
||||
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
|
||||
} NBUF;
|
||||
|
||||
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
|
||||
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
|
||||
int fec5xxx_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr);
|
||||
int fec5xxx_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr, u16 data);
|
||||
|
||||
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
|
||||
|
||||
@ -917,8 +919,17 @@ int mpc5xxx_fec_initialize(bd_t * bis)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register (dev->name,
|
||||
fec5xxx_miiphy_read, fec5xxx_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = fec5xxx_miiphy_read;
|
||||
mdiodev->write = fec5xxx_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
/*
|
||||
@ -941,8 +952,10 @@ int mpc5xxx_fec_initialize(bd_t * bis)
|
||||
|
||||
/* MII-interface related functions */
|
||||
/********************************************************************/
|
||||
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
|
||||
int fec5xxx_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr)
|
||||
{
|
||||
uint16 retVal = 0;
|
||||
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
|
||||
uint32 reg; /* convenient holder for the PHY register */
|
||||
uint32 phy; /* convenient holder for the PHY */
|
||||
@ -977,13 +990,14 @@ int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint1
|
||||
/*
|
||||
* it's now safe to read the PHY's register
|
||||
*/
|
||||
*retVal = (uint16) eth->mii_data;
|
||||
retVal = (uint16) eth->mii_data;
|
||||
|
||||
return 0;
|
||||
return retVal;
|
||||
}
|
||||
|
||||
/********************************************************************/
|
||||
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
|
||||
int fec5xxx_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
|
||||
int regAddr, u16 data)
|
||||
{
|
||||
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
|
||||
uint32 reg; /* convenient holder for the PHY register */
|
||||
|
@ -48,9 +48,11 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
*
|
||||
* Returns 16bit phy register value, or 0xffff on error
|
||||
*/
|
||||
static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
|
||||
static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
|
||||
int reg_ofs)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
u16 data = 0;
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
|
||||
struct mvgbe_registers *regs = dmvgbe->regs;
|
||||
u32 smi_reg;
|
||||
@ -60,8 +62,8 @@ static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
|
||||
if (phy_adr == MV_PHY_ADR_REQUEST &&
|
||||
reg_ofs == MV_PHY_ADR_REQUEST) {
|
||||
/* */
|
||||
*data = (u16) (MVGBE_REG_RD(regs->phyadr) & PHYADR_MASK);
|
||||
return 0;
|
||||
data = (u16) (MVGBE_REG_RD(regs->phyadr) & PHYADR_MASK);
|
||||
return data;
|
||||
}
|
||||
/* check parameters */
|
||||
if (phy_adr > PHYADR_MASK) {
|
||||
@ -111,12 +113,12 @@ static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
|
||||
for (timeout = 0; timeout < MVGBE_PHY_SMI_TIMEOUT; timeout++)
|
||||
;
|
||||
|
||||
*data = (u16) (MVGBE_REG_RD(MVGBE_SMI_REG) & MVGBE_PHY_SMI_DATA_MASK);
|
||||
data = (u16) (MVGBE_REG_RD(MVGBE_SMI_REG) & MVGBE_PHY_SMI_DATA_MASK);
|
||||
|
||||
debug("%s:(adr %d, off %d) value= %04x\n", __func__, phy_adr, reg_ofs,
|
||||
*data);
|
||||
data);
|
||||
|
||||
return 0;
|
||||
return data;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -125,9 +127,10 @@ static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
|
||||
* Returns 0 if write succeed, -EINVAL on bad parameters
|
||||
* -ETIME on timeout
|
||||
*/
|
||||
static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
|
||||
static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
|
||||
int reg_ofs, u16 data)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
|
||||
struct mvgbe_registers *regs = dmvgbe->regs;
|
||||
u32 smi_reg;
|
||||
@ -785,7 +788,17 @@ error1:
|
||||
#if defined(CONFIG_PHYLIB)
|
||||
mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum);
|
||||
#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, smi_reg_read, smi_reg_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = smi_reg_read;
|
||||
mdiodev->write = smi_reg_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
/* Set phy address of the port */
|
||||
miiphy_write(dev->name, MV_PHY_ADR_REQUEST,
|
||||
MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum);
|
||||
|
@ -566,7 +566,17 @@ int sh_eth_initialize(bd_t *bd)
|
||||
eth_register(dev);
|
||||
|
||||
bb_miiphy_buses[0].priv = eth;
|
||||
miiphy_register(dev->name, bb_miiphy_read, bb_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = bb_miiphy_read;
|
||||
mdiodev->write = bb_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
|
||||
if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr))
|
||||
puts("Please set MAC address\n");
|
||||
|
@ -219,17 +219,24 @@ static int smc911x_rx(struct eth_device *dev)
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
/* wrapper for smc911x_eth_phy_read */
|
||||
static int smc911x_miiphy_read(const char *devname, u8 phy, u8 reg, u16 *val)
|
||||
static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
|
||||
int reg)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
if (dev)
|
||||
return smc911x_eth_phy_read(dev, phy, reg, val);
|
||||
u16 val = 0;
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
if (dev) {
|
||||
int retval = smc911x_eth_phy_read(dev, phy, reg, &val);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
return val;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
/* wrapper for smc911x_eth_phy_write */
|
||||
static int smc911x_miiphy_write(const char *devname, u8 phy, u8 reg, u16 val)
|
||||
static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
|
||||
int reg, u16 val)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(devname);
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
if (dev)
|
||||
return smc911x_eth_phy_write(dev, phy, reg, val);
|
||||
return -1;
|
||||
@ -276,7 +283,17 @@ int smc911x_initialize(u8 dev_num, int base_addr)
|
||||
eth_register(dev);
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, smc911x_miiphy_read, smc911x_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = smc911x_miiphy_read;
|
||||
mdiodev->write = smc911x_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
return 1;
|
||||
|
@ -623,20 +623,20 @@ static int uec_miiphy_find_dev_by_name(const char *devname)
|
||||
* Returns:
|
||||
* 0 on success
|
||||
*/
|
||||
static int uec_miiphy_read(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short *value)
|
||||
static int uec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
|
||||
{
|
||||
unsigned short value = 0;
|
||||
int devindex = 0;
|
||||
|
||||
if (devname == NULL || value == NULL) {
|
||||
if (bus->name == NULL || &value == NULL) {
|
||||
debug("%s: NULL pointer given\n", __FUNCTION__);
|
||||
} else {
|
||||
devindex = uec_miiphy_find_dev_by_name(devname);
|
||||
devindex = uec_miiphy_find_dev_by_name(bus->name);
|
||||
if (devindex >= 0) {
|
||||
*value = uec_read_phy_reg(devlist[devindex], addr, reg);
|
||||
value = uec_read_phy_reg(devlist[devindex], addr, reg);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
return value;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -645,15 +645,15 @@ static int uec_miiphy_read(const char *devname, unsigned char addr,
|
||||
* Returns:
|
||||
* 0 on success
|
||||
*/
|
||||
static int uec_miiphy_write(const char *devname, unsigned char addr,
|
||||
unsigned char reg, unsigned short value)
|
||||
static int uec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
|
||||
u16 value)
|
||||
{
|
||||
int devindex = 0;
|
||||
|
||||
if (devname == NULL) {
|
||||
if (bus->name == NULL) {
|
||||
debug("%s: NULL pointer given\n", __FUNCTION__);
|
||||
} else {
|
||||
devindex = uec_miiphy_find_dev_by_name(devname);
|
||||
devindex = uec_miiphy_find_dev_by_name(bus->name);
|
||||
if (devindex >= 0) {
|
||||
uec_write_phy_reg(devlist[devindex], addr, reg, value);
|
||||
}
|
||||
@ -1399,7 +1399,17 @@ int uec_initialize(bd_t *bis, uec_info_t *uec_info)
|
||||
}
|
||||
|
||||
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
||||
miiphy_register(dev->name, uec_miiphy_read, uec_miiphy_write);
|
||||
int retval;
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
mdiodev->read = uec_miiphy_read;
|
||||
mdiodev->write = uec_miiphy_write;
|
||||
|
||||
retval = mdio_register(mdiodev);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
#endif
|
||||
|
||||
return 1;
|
||||
|
Loading…
Reference in New Issue
Block a user