Convert CONFIG_SYS_RAMBOOT to Kconfig
This converts the following to Kconfig: CONFIG_SYS_RAMBOOT Signed-off-by: Tom Rini <trini@konsulko.com>
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3dab405b45
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5a4461867c
@ -109,6 +109,7 @@ config TARGET_QEMU_PPCE500
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bool "Support qemu-ppce500"
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select ARCH_QEMU_E500
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select PHYS_64BIT
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select SYS_RAMBOOT
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imply OF_HAS_PRIOR_STAGE
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config TARGET_T1024RDB
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@ -555,8 +555,12 @@ config CHROMEOS_VBOOT
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distinguishing between booting Chrome OS in a basic way (developer
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mode) and a full boot.
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config SYS_RAMBOOT
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bool
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config RAMBOOT_PBL
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bool "Freescale PBL(pre-boot loader) image format support"
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select SYS_RAMBOOT if PPC
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help
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Some SoCs use PBL to load RCW and/or pre-initialization instructions.
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For more details refer to doc/README.pblimage
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@ -126,12 +126,6 @@
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* The reserved memory
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*/
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_RAMBOOT
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#else
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#undef CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
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/*
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@ -342,12 +342,6 @@ extern unsigned long get_sdram_size(void);
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FTIM2_GPCM_TWP(0x1f))
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#define CONFIG_SYS_CS3_FTIM3 0x0
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#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
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#define CONFIG_SYS_RAMBOOT
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#else
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#undef CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_SYS_INIT_RAM_LOCK
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#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */
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@ -129,10 +129,6 @@
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#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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/* Nand Flash */
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#ifdef CONFIG_NAND_FSL_ELBC
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#define CONFIG_SYS_NAND_BASE 0xffa00000
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@ -287,10 +287,6 @@
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#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
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#endif
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_HWCONFIG
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/* define to use L1 as initial stack */
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@ -259,10 +259,6 @@
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#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
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#endif
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_HWCONFIG
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/* define to use L1 as initial stack */
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@ -267,10 +267,6 @@
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#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
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#endif
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_HWCONFIG
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/* define to use L1 as initial stack */
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@ -226,10 +226,6 @@
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#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
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#endif
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_HWCONFIG
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/* define to use L1 as initial stack */
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@ -321,10 +321,6 @@
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FTIM2_GPCM_TWP(0x1f))
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#define CONFIG_SYS_CS3_FTIM3 0x0
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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/* I2C */
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#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
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#define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */
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@ -119,10 +119,6 @@
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#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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#if defined(CONFIG_RAMBOOT_PBL)
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#define CONFIG_SYS_RAMBOOT
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#endif
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/* Nand Flash */
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#ifdef CONFIG_NAND_FSL_ELBC
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#define CONFIG_SYS_NAND_BASE 0xffa00000
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@ -25,10 +25,6 @@
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*/
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#define CONFIG_SYS_FLASH_BASE 0xF0000000
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_RAMBOOT
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#endif
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/* Reserve 768 kB for Mon */
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#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
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@ -81,10 +77,6 @@
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* Environment
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*/
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#ifndef CONFIG_SYS_RAMBOOT
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/* Address and size of Redundant Environment Sector */
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#endif /* CFG_SYS_RAMBOOT */
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/*
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* Environment Configuration
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*/
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@ -414,8 +414,6 @@
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#ifdef CONFIG_TPL_BUILD
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#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
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#endif
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#elif defined(CONFIG_SYS_RAMBOOT)
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#define SPL_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
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#endif
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#define CONFIG_LOADS_ECHO /* echo on for serial download */
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@ -9,8 +9,6 @@
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#ifndef __QEMU_PPCE500_H
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#define __QEMU_PPCE500_H
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#define CONFIG_SYS_RAMBOOT
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/* Needed to fill the ccsrbar pointer */
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/* Virtual address to CCSRBAR */
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