sysreset: Add Octeon sysreset driver
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC family. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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@ -57,6 +57,13 @@ config SYSRESET_MICROBLAZE
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help
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help
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This is soft reset on Microblaze which does jump to 0x0 address.
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This is soft reset on Microblaze which does jump to 0x0 address.
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config SYSRESET_OCTEON
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bool "Enable support for Marvell Octeon SoC family"
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depends on ARCH_OCTEON
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help
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This enables the system reset driver support for Marvell Octeon
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SoCs.
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config SYSRESET_PSCI
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config SYSRESET_PSCI
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bool "Enable support for PSCI System Reset"
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bool "Enable support for PSCI System Reset"
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depends on ARM_PSCI_FW
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depends on ARM_PSCI_FW
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@ -10,6 +10,7 @@ obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
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obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
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obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
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obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
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obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
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obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
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obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
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obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
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obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
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obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
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obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
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obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
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obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
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obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
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52
drivers/sysreset/sysreset_octeon.c
Normal file
52
drivers/sysreset/sysreset_octeon.c
Normal file
@ -0,0 +1,52 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <sysreset.h>
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#include <asm/io.h>
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#define RST_SOFT_RST 0x0080
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struct octeon_sysreset_data {
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void __iomem *base;
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};
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static int octeon_sysreset_request(struct udevice *dev, enum sysreset_t type)
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{
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struct octeon_sysreset_data *data = dev_get_priv(dev);
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writeq(1, data->base + RST_SOFT_RST);
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return -EINPROGRESS;
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}
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static int octeon_sysreset_probe(struct udevice *dev)
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{
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struct octeon_sysreset_data *data = dev_get_priv(dev);
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data->base = dev_remap_addr(dev);
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return 0;
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}
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static struct sysreset_ops octeon_sysreset = {
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.request = octeon_sysreset_request,
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};
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static const struct udevice_id octeon_sysreset_ids[] = {
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{ .compatible = "mrvl,cn7xxx-rst" },
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{ }
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};
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U_BOOT_DRIVER(sysreset_octeon) = {
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.id = UCLASS_SYSRESET,
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.name = "octeon_sysreset",
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.priv_auto_alloc_size = sizeof(struct octeon_sysreset_data),
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.ops = &octeon_sysreset,
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.probe = octeon_sysreset_probe,
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.of_match = octeon_sysreset_ids,
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};
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