ARM: uniphier: add uniphier_cache_inv_way() to support way invalidation
This invalidates entries in specified ways of the outer cache. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -72,7 +72,8 @@
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#define UNIPHIER_SSCOQAD_IS_NEEDED(op) \
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((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
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#define UNIPHIER_SSCOQWM_IS_NEEDED(op) \
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((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY)
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(((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_WAY) || \
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((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY))
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/* uniphier_cache_sync - perform a sync point for a particular cache level */
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static void uniphier_cache_sync(void)
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@ -184,6 +185,13 @@ void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways)
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UNIPHIER_SSCOQM_CM_TOUCH_ZERO);
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}
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void uniphier_cache_inv_way(u32 ways)
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{
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uniphier_cache_maint_common(0, 0, ways,
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UNIPHIER_SSCOQM_S_WAY |
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UNIPHIER_SSCOQM_CM_INV);
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}
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static void uniphier_cache_endisable(int enable)
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{
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u32 tmp;
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@ -13,6 +13,7 @@
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void uniphier_cache_prefetch_range(u32 start, u32 end, u32 ways);
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void uniphier_cache_touch_range(u32 start, u32 end, u32 ways);
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void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways);
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void uniphier_cache_inv_way(u32 ways);
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void uniphier_cache_enable(void);
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void uniphier_cache_disable(void);
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