leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

powerpc/mpc85xxcds: Fix PCI speed

Browse Source 
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz.

Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
chenhui zhao 2011-09-15 14:52:34 +08:00 committed by Kumar Gala
parent a6d0bfa86f
commit 568336ecc7
4 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
board/freescale/common/cadmus.c
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004 Freescale Semiconductor.
* Copyright 2004, 2011 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -61,12 +61,12 @@ get_clock_freq(void)
uint pci1_speed = (cadmus->cm_pci >> 2) & 0x3; /* PSPEED in [4:5] */
if (pci1_speed == 0) {
return 33000000;
return 33333333;
} else if (pci1_speed == 1) {
return 66000000;
return 66666666;
} else {
/* Really, unknown. Be safe? */
return 33000000;
return 33333333;
}
}

6
board/freescale/mpc8541cds/mpc8541cds.c
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004 Freescale Semiconductor.
* Copyright 2004, 2011 Freescale Semiconductor.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
@ -200,6 +200,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
char buf[32];
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@ -222,8 +223,7 @@ int checkboard (void)
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
strmhz(buf, pci1_speed),
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {

4
board/freescale/mpc8548cds/mpc8548cds.c
View File

@ -214,6 +214,7 @@ void pci_init_board(void)
u32 devdisr, pordevsr, io_sel;
u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
int first_free_busno = 0;
char buf[32];
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
@ -238,8 +239,7 @@ void pci_init_board(void)
pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs);
printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
strmhz(buf, pci_speed),
pci_clk_sel ? "sync" : "async",
pci_agent ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter",

6
board/freescale/mpc8555cds/mpc8555cds.c
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004 Freescale Semiconductor.
* Copyright 2004, 2011 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -198,6 +198,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
int checkboard (void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
char buf[32];
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@ -220,8 +221,7 @@ int checkboard (void)
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
strmhz(buf, pci1_speed),
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {