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Convert CONFIG_SPL_RELOC_TEXT_BASE et al to Kconfig

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This converts the following to Kconfig:
   CONFIG_SPL_RELOC_TEXT_BASE
   CONFIG_SPL_RELOC_STACK
   CONFIG_SPL_RELOC_MALLOC_ADDR
   CONFIG_SPL_RELOC_MALLOC_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-05-26 16:59:30 -04:00
parent 90e1fd0910
commit 55cf860ba7
63 changed files with 270 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
README
View File

@ -1625,10 +1625,6 @@ The following options need to be configured:
CONFIG_SPL
Enable building of SPL globally.
CONFIG_SPL_RELOC_TEXT_BASE
Address to relocate to. If unspecified, this is equal to
CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
CONFIG_SPL_BSS_START_ADDR
Link address for the BSS within the SPL binary.
@ -1642,15 +1638,6 @@ The following options need to be configured:
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation. If unspecified, this is equal to
CONFIG_SYS_SPL_MALLOC_START
Starting address of the malloc pool used in SPL.
When this option is set the full malloc is used in SPL and
it is set up by spl_init() and before that, the simple malloc()
can be used if CONFIG_SYS_MALLOC_F is defined.
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.

6
board/freescale/p1010rdb/spl.c
View File

@ -57,7 +57,7 @@ void board_init_f(ulong bootflag)
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE);
}
void board_init_r(gd_t *gd, ulong dest_addr)
@ -73,8 +73,8 @@ void board_init_r(gd_t *gd, ulong dest_addr)
arch_cpu_init();
get_clocks();
mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
CONFIG_SPL_RELOC_MALLOC_SIZE);
mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR),
CONFIG_VAL(RELOC_MALLOC_SIZE));
gd->flags |= GD_FLG_FULL_MALLOC_INIT;
#ifndef CONFIG_SPL_NAND_BOOT

6
board/freescale/p1_p2_rdb_pc/spl.c
View File

@ -63,7 +63,7 @@ void board_init_f(ulong bootflag)
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE);
}
void board_init_r(gd_t *gd, ulong dest_addr)
@ -79,8 +79,8 @@ void board_init_r(gd_t *gd, ulong dest_addr)
arch_cpu_init();
get_clocks();
mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
CONFIG_SPL_RELOC_MALLOC_SIZE);
mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR),
CONFIG_VAL(RELOC_MALLOC_SIZE));
gd->flags |= GD_FLG_FULL_MALLOC_INIT;
#ifdef CONFIG_SPL_ENV_SUPPORT

59
common/spl/Kconfig
View File

@ -219,8 +219,8 @@ config TPL_SYS_CCSR_DO_NOT_RELOCATE
endmenu
menu "PowerPC SPL specific options"
depends on PPC && (SUPPORT_SPL && !SPL_FRAMEWORK)
menu "PowerPC SPL / TPL specific options"
depends on PPC && (SPL && !SPL_FRAMEWORK)
config SPL_INIT_MINIMAL
bool "Arch init code will be built for a very small image"
@ -231,6 +231,61 @@ config SPL_FLUSH_IMAGE
config SPL_SKIP_RELOCATE
bool "Skip relocating SPL"
config SPL_RELOC_TEXT_BASE
hex "Address to relocate SPL to"
default SPL_TEXT_BASE
help
If unspecified, this is equal to CONFIG_SPL_TEXT_BASE (i.e. no
relocation is done).
config SPL_RELOC_STACK
hex "Address of the start of the stack SPL will use after relocation."
help
If unspecified, this is equal to CONFIG_SYS_SPL_MALLOC_START. Starting
address of the malloc pool used in SPL. When this option is set the full
malloc is used in SPL and it is set up by spl_init() and before that, the
simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
config SPL_RELOC_MALLOC
bool "SPL has malloc pool after relocation"
config SPL_RELOC_MALLOC_ADDR
hex "Address of malloc pool in SPL"
depends on SPL_RELOC_MALLOC
config SPL_RELOC_MALLOC_SIZE
hex "Size of malloc pool in SPL"
depends on SPL_RELOC_MALLOC
config TPL_RELOC_TEXT_BASE
hex "Address to relocate TPL to"
depends on TPL
default TPL_TEXT_BASE
help
If unspecified, this is equal to CONFIG_TPL_TEXT_BASE (i.e. no
relocation is done).
config TPL_RELOC_STACK
hex "Address of the start of the stack TPL will use after relocation."
depends on TPL
help
If unspecified, this is equal to CONFIG_SYS_TPL_MALLOC_START. Starting
address of the malloc pool used in TPL. When this option is set the full
malloc is used in TPL and it is set up by spl_init() and before that, the
simple malloc() can be used if CONFIG_SYS_MALLOC_F is defined.
config TPL_RELOC_MALLOC
bool "TPL has malloc pool after relocation"
depends on TPL
config TPL_RELOC_MALLOC_ADDR
hex "Address of malloc pool in TPL"
depends on TPL_RELOC_MALLOC
config TPL_RELOC_MALLOC_SIZE
hex "Size of malloc pool in TPL"
depends on TPL_RELOC_MALLOC
endmenu
config HANDOFF

7
configs/P1010RDB-PA_36BIT_NAND_defconfig
View File

@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
CONFIG_SPL_RELOC_STACK=0xd003fff0
CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_TPL_RELOC_STACK=0xd0030000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

1
configs/P1010RDB-PA_36BIT_NOR_defconfig
View File

@ -22,7 +22,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

5
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
View File

@ -30,6 +30,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

5
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
View File

@ -33,6 +33,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

7
configs/P1010RDB-PA_NAND_defconfig
View File

@ -32,6 +32,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
CONFIG_SPL_RELOC_STACK=0xd003fff0
CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_TPL_RELOC_STACK=0xd0030000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

1
configs/P1010RDB-PA_NOR_defconfig
View File

@ -21,7 +21,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

5
configs/P1010RDB-PA_SDCARD_defconfig
View File

@ -29,6 +29,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

5
configs/P1010RDB-PA_SPIFLASH_defconfig
View File

@ -32,6 +32,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

7
configs/P1010RDB-PB_36BIT_NAND_defconfig
View File

@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
CONFIG_SPL_RELOC_STACK=0xd003fff0
CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_TPL_RELOC_STACK=0xd0030000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

1
configs/P1010RDB-PB_36BIT_NOR_defconfig
View File

@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

5
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
View File

@ -31,6 +31,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

5
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
View File

@ -34,6 +34,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

7
configs/P1010RDB-PB_NAND_defconfig
View File

@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
CONFIG_SPL_RELOC_STACK=0xd003fff0
CONFIG_TPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_TPL_RELOC_STACK=0xd0030000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

1
configs/P1010RDB-PB_NOR_defconfig
View File

@ -22,7 +22,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

5
configs/P1010RDB-PB_SDCARD_defconfig
View File

@ -30,6 +30,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

5
configs/P1010RDB-PB_SPIFLASH_defconfig
View File

@ -33,6 +33,11 @@ CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000
CONFIG_SPL_RELOC_STACK=0xd001c000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

7
configs/P1020RDB-PC_36BIT_NAND_defconfig
View File

@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
CONFIG_SPL_RELOC_STACK=0xf8fbfff0
CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
CONFIG_TPL_RELOC_STACK=0xf8fb0000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

4
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
View File

@ -32,6 +32,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
View File

@ -35,6 +35,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

1
configs/P1020RDB-PC_36BIT_defconfig
View File

@ -24,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276

7
configs/P1020RDB-PC_NAND_defconfig
View File

@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
CONFIG_SPL_RELOC_STACK=0xf8fbfff0
CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
CONFIG_TPL_RELOC_STACK=0xf8fb0000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

4
configs/P1020RDB-PC_SDCARD_defconfig
View File

@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/P1020RDB-PC_SPIFLASH_defconfig
View File

@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

1
configs/P1020RDB-PC_defconfig
View File

@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276

7
configs/P1020RDB-PD_NAND_defconfig
View File

@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
CONFIG_SPL_RELOC_STACK=0xf8fbfff0
CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
CONFIG_TPL_RELOC_STACK=0xf8fb0000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

4
configs/P1020RDB-PD_SDCARD_defconfig
View File

@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/P1020RDB-PD_SPIFLASH_defconfig
View File

@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

1
configs/P1020RDB-PD_defconfig
View File

@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276

7
configs/P2020RDB-PC_36BIT_NAND_defconfig
View File

@ -34,6 +34,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000
CONFIG_SPL_RELOC_STACK=0xf8fffff0
CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
CONFIG_TPL_RELOC_STACK=0xf8fb0000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

4
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
View File

@ -32,6 +32,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
View File

@ -35,6 +35,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

1
configs/P2020RDB-PC_36BIT_defconfig
View File

@ -24,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276

7
configs/P2020RDB-PC_NAND_defconfig
View File

@ -33,6 +33,13 @@ CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_INIT_MINIMAL=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_TEXT_BASE=0xf8ffe000
CONFIG_SPL_RELOC_STACK=0xf8fffff0
CONFIG_TPL_RELOC_TEXT_BASE=0xf8f81000
CONFIG_TPL_RELOC_STACK=0xf8fb0000
CONFIG_TPL_RELOC_MALLOC=y
CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_TPL=y
CONFIG_TPL_MAX_SIZE=0x20000

4
configs/P2020RDB-PC_SDCARD_defconfig
View File

@ -31,6 +31,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/P2020RDB-PC_SPIFLASH_defconfig
View File

@ -34,6 +34,10 @@ CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_RELOC_STACK=0xf8f9d000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

1
configs/P2020RDB-PC_defconfig
View File

@ -23,7 +23,6 @@ CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PBSIZE=276

4
configs/T1024RDB_NAND_defconfig
View File

@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T1024RDB_SDCARD_defconfig
View File

@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T1024RDB_SPIFLASH_defconfig
View File

@ -43,6 +43,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T1042D4RDB_NAND_defconfig
View File

@ -35,6 +35,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T1042D4RDB_SDCARD_defconfig
View File

@ -36,6 +36,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T1042D4RDB_SPIFLASH_defconfig
View File

@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0x7800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080QDS_NAND_defconfig
View File

@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080QDS_SDCARD_defconfig
View File

@ -41,6 +41,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080QDS_SPIFLASH_defconfig
View File

@ -44,6 +44,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_NAND_defconfig
View File

@ -38,6 +38,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_SDCARD_defconfig
View File

@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_SPIFLASH_defconfig
View File

@ -42,6 +42,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_revD_NAND_defconfig
View File

@ -39,6 +39,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_revD_SDCARD_defconfig
View File

@ -40,6 +40,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T2080RDB_revD_SPIFLASH_defconfig
View File

@ -43,6 +43,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

4
configs/T4240RDB_SDCARD_defconfig
View File

@ -37,6 +37,10 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
CONFIG_SPL_FLUSH_IMAGE=y
CONFIG_SPL_SKIP_RELOCATE=y
CONFIG_SPL_RELOC_STACK=0xfffd8000
CONFIG_SPL_RELOC_MALLOC=y
CONFIG_SPL_RELOC_MALLOC_ADDR=0xfffcb000
CONFIG_SPL_RELOC_MALLOC_SIZE=0xc800
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y

12
include/configs/P1010RDB.h
View File

@ -43,8 +43,6 @@
#ifdef CONFIG_NXP_ESBC
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000
#define CONFIG_SPL_RELOC_STACK 0x00100000
#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
@ -392,10 +390,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
@ -403,18 +397,12 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
#else
#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_L2_SIZE (256 << 10)
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000)
#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
#endif
#endif
#endif

3
include/configs/T102xRDB.h
View File

@ -121,9 +121,6 @@
#define CONFIG_SYS_L3_SIZE (256 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_DCSRBAR 0xf0000000

3
include/configs/T104xRDB.h
View File

@ -108,9 +108,6 @@
#define CONFIG_SYS_L3_SIZE 256 << 10
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_VADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull

3
include/configs/T208xQDS.h
View File

@ -94,9 +94,6 @@
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull

3
include/configs/T208xRDB.h
View File

@ -89,9 +89,6 @@
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull

3
include/configs/T4240RDB.h
View File

@ -69,9 +69,6 @@
#define CONFIG_SYS_L3_SIZE (512 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L3_ADDR + 32 * 1024)
#define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SPL_GD_ADDR + 12 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (50 << 10)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SPL_GD_ADDR + 64 * 1024)
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull

14
include/configs/p1_p2_rdb_pc.h
View File

@ -336,31 +336,17 @@
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
#if defined(CONFIG_TARGET_P2020RDB)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
#else
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
#endif
#elif defined(CONFIG_MTD_RAW_NAND)
#ifdef CONFIG_TPL_BUILD
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
#else
#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000)
#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
#endif /* CONFIG_TPL_BUILD */
#endif
#endif