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ARM64: zynqmp: Fix USB ulpi phy sequence

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It should be enough to call low(5us)->high pulse for all cases
to provide proper reset. There is no need to call high->low->high.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2016-08-16 15:40:05 +02:00
parent 48255f5276
commit 5242772c51
1 changed files with 0 additions and 4 deletions
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4
arch/arm/cpu/armv8/zynqmp/spl.c
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@ -37,10 +37,6 @@ void board_init_f(ulong dummy)
static void ps_mode_reset(ulong mode)
{
writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
&crlapb_base->boot_pin_ctrl);
udelay(1);
writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
&crlapb_base->boot_pin_ctrl);
udelay(5);