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ARM: uniphier: refactor cmd_ddrmphy

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Make it look like cmd_ddrphy.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2017-01-28 06:53:47 +09:00
parent fada9eafe1
commit 513cfaccc8
1 changed files with 109 additions and 80 deletions
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189
arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
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@ -1,13 +1,15 @@
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include "../init.h"
#include "../soc-info.h"
#include "ddrmphy-regs.h"
/* Select either decimal or hexadecimal */
@ -19,24 +21,41 @@
/* field separator */
#define FS " "
static void __iomem *get_phy_base(int ch)
{
return (void __iomem *)(0x5b830000 + ch * 0x00200000);
}
#define ptr_to_uint(p) ((unsigned int)(unsigned long)(p))
static int get_nr_ch(void)
{
const struct uniphier_board_data *bd = uniphier_get_board_param();
#define UNIPHIER_MAX_NR_DDRMPHY 3
return bd->dram_ch[2].size ? 3 : 2;
}
struct uniphier_ddrmphy_param {
unsigned int soc_id;
unsigned int nr_phy;
struct {
resource_size_t base;
unsigned int nr_zq;
unsigned int nr_dx;
} phy[UNIPHIER_MAX_NR_DDRMPHY];
};
static int get_nr_datx8(int ch)
{
const struct uniphier_board_data *bd = uniphier_get_board_param();
return bd->dram_ch[ch].width / 8;
}
static const struct uniphier_ddrmphy_param uniphier_ddrmphy_param[] = {
{
.soc_id = UNIPHIER_PXS2_ID,
.nr_phy = 3,
.phy = {
{ .base = 0x5b830000, .nr_zq = 3, .nr_dx = 4, },
{ .base = 0x5ba30000, .nr_zq = 3, .nr_dx = 4, },
{ .base = 0x5bc30000, .nr_zq = 2, .nr_dx = 2, },
},
},
{
.soc_id = UNIPHIER_LD6B_ID,
.nr_phy = 3,
.phy = {
{ .base = 0x5b830000, .nr_zq = 3, .nr_dx = 4, },
{ .base = 0x5ba30000, .nr_zq = 3, .nr_dx = 4, },
{ .base = 0x5bc30000, .nr_zq = 2, .nr_dx = 2, },
},
},
};
UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_ddrmphy_param, uniphier_ddrmphy_param)
static void print_bdl(void __iomem *reg, int n)
{
@ -47,59 +66,60 @@ static void print_bdl(void __iomem *reg, int n)
printf(FS PRINTF_FORMAT, (val >> i * 8) & 0x1f);
}
static void dump_loop(void (*callback)(void __iomem *))
static void dump_loop(const struct uniphier_ddrmphy_param *param,
void (*callback)(void __iomem *))
{
int ch, dx, nr_ch, nr_dx;
void __iomem *dx_base;
void __iomem *phy_base, *dx_base;
int phy, dx;
nr_ch = get_nr_ch();
for (phy = 0; phy < param->nr_phy; phy++) {
phy_base = ioremap(param->phy[phy].base, SZ_4K);
dx_base = phy_base + MPHY_DX_BASE;
for (ch = 0; ch < nr_ch; ch++) {
dx_base = get_phy_base(ch) + MPHY_DX_BASE;
nr_dx = get_nr_datx8(ch);
for (dx = 0; dx < nr_dx; dx++) {
printf("CH%dDX%d:", ch, dx);
for (dx = 0; dx < param->phy[phy].nr_dx; dx++) {
printf("PHY%dDX%d:", phy, dx);
(*callback)(dx_base);
dx_base += MPHY_DX_STRIDE;
printf("\n");
}
iounmap(phy_base);
}
}
static void zq_dump(void)
static void zq_dump(const struct uniphier_ddrmphy_param *param)
{
int ch, zq, nr_ch, nr_zq, i;
void __iomem *zq_base;
u32 dr, pr;
void __iomem *phy_base, *zq_base;
u32 val;
int phy, zq, i;
printf("\n--- Impedance Data ---\n");
printf(" ZPD ZPU OPD OPU ZDV ODV\n");
printf(" ZPD ZPU OPD OPU ZDV ODV\n");
nr_ch = get_nr_ch();
for (phy = 0; phy < param->nr_phy; phy++) {
phy_base = ioremap(param->phy[phy].base, SZ_4K);
zq_base = phy_base + MPHY_ZQ_BASE;
for (ch = 0; ch < nr_ch; ch++) {
zq_base = get_phy_base(ch) + MPHY_ZQ_BASE;
nr_zq = 3;
for (zq = 0; zq < param->phy[phy].nr_zq; zq++) {
printf("PHY%dZQ%d:", phy, zq);
for (zq = 0; zq < nr_zq; zq++) {
printf("CH%dZQ%d:", ch, zq);
dr = readl(zq_base + MPHY_ZQ_DR);
val = readl(zq_base + MPHY_ZQ_DR);
for (i = 0; i < 4; i++) {
printf(FS PRINTF_FORMAT, dr & 0x7f);
dr >>= 7;
printf(FS PRINTF_FORMAT, val & 0x7f);
val >>= 7;
}
pr = readl(zq_base + MPHY_ZQ_PR);
val = readl(zq_base + MPHY_ZQ_PR);
for (i = 0; i < 2; i++) {
printf(FS PRINTF_FORMAT, pr & 0xf);
pr >>= 4;
printf(FS PRINTF_FORMAT, val & 0xf);
val >>= 4;
}
zq_base += MPHY_ZQ_STRIDE;
printf("\n");
}
iounmap(phy_base);
}
}
@ -113,12 +133,12 @@ static void __wbdl_dump(void __iomem *dx_base)
readl(dx_base + MPHY_DX_LCDLR1) & 0xff);
}
static void wbdl_dump(void)
static void wbdl_dump(const struct uniphier_ddrmphy_param *param)
{
printf("\n--- Write Bit Delay Line ---\n");
printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM DQS (WDQD)\n");
printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM DQS (WDQD)\n");
dump_loop(&__wbdl_dump);
dump_loop(param, &__wbdl_dump);
}
static void __rbdl_dump(void __iomem *dx_base)
@ -134,12 +154,12 @@ static void __rbdl_dump(void __iomem *dx_base)
(readl(dx_base + MPHY_DX_LCDLR1) >> 16) & 0xff);
}
static void rbdl_dump(void)
static void rbdl_dump(const struct uniphier_ddrmphy_param *param)
{
printf("\n--- Read Bit Delay Line ---\n");
printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM (RDQSD) (RDQSND)\n");
printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM (RDQSD) (RDQSND)\n");
dump_loop(&__rbdl_dump);
dump_loop(param, &__rbdl_dump);
}
static void __wld_dump(void __iomem *dx_base)
@ -157,12 +177,12 @@ static void __wld_dump(void __iomem *dx_base)
}
}
static void wld_dump(void)
static void wld_dump(const struct uniphier_ddrmphy_param *param)
{
printf("\n--- Write Leveling Delay ---\n");
printf(" Rank0 Rank1 Rank2 Rank3\n");
printf(" Rank0 Rank1 Rank2 Rank3\n");
dump_loop(&__wld_dump);
dump_loop(param, &__wld_dump);
}
static void __dqsgd_dump(void __iomem *dx_base)
@ -179,12 +199,12 @@ static void __dqsgd_dump(void __iomem *dx_base)
}
}
static void dqsgd_dump(void)
static void dqsgd_dump(const struct uniphier_ddrmphy_param *param)
{
printf("\n--- DQS Gating Delay ---\n");
printf(" Rank0 Rank1 Rank2 Rank3\n");
printf(" Rank0 Rank1 Rank2 Rank3\n");
dump_loop(&__dqsgd_dump);
dump_loop(param, &__dqsgd_dump);
}
static void __mdl_dump(void __iomem *dx_base)
@ -196,12 +216,12 @@ static void __mdl_dump(void __iomem *dx_base)
printf(FS PRINTF_FORMAT, (mdl >> (8 * i)) & 0xff);
}
static void mdl_dump(void)
static void mdl_dump(const struct uniphier_ddrmphy_param *param)
{
printf("\n--- Master Delay Line ---\n");
printf(" IPRD TPRD MDLD\n");
printf(" IPRD TPRD MDLD\n");
dump_loop(&__mdl_dump);
dump_loop(param, &__mdl_dump);
}
#define REG_DUMP(x) \
@ -216,20 +236,18 @@ static void mdl_dump(void)
printf("%3d: DX%d%-7s: %p : %08x\n", \
ofst >> MPHY_SHIFT, (dx), #x, reg, readl(reg)); }
static void reg_dump(void)
static void reg_dump(const struct uniphier_ddrmphy_param *param)
{
int ch, dx, nr_ch, nr_dx;
void __iomem *phy_base;
int phy, dx;
printf("\n--- DDR PHY registers ---\n");
printf("\n--- DDR Multi PHY registers ---\n");
nr_ch = get_nr_ch();
for (phy = 0; phy < param->nr_phy; phy++) {
phy_base = ioremap(param->phy[phy].base, SZ_4K);
for (ch = 0; ch < nr_ch; ch++) {
phy_base = get_phy_base(ch);
nr_dx = get_nr_datx8(ch);
printf("== Ch%d ==\n", ch);
printf("== PHY%d (base: %08x) ==\n", phy,
ptr_to_uint(phy_base));
printf(" No: Name : Address : Data\n");
REG_DUMP(RIDR);
@ -260,50 +278,61 @@ static void reg_dump(void)
REG_DUMP(MR2);
REG_DUMP(MR3);
for (dx = 0; dx < nr_dx; dx++) {
for (dx = 0; dx < param->phy[phy].nr_dx; dx++) {
DX_REG_DUMP(dx, GCR0);
DX_REG_DUMP(dx, GCR1);
DX_REG_DUMP(dx, GCR2);
DX_REG_DUMP(dx, GCR3);
DX_REG_DUMP(dx, GTR);
}
iounmap(phy_base);
}
}
static int do_ddrm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *cmd = argv[1];
const struct uniphier_ddrmphy_param *param;
char *cmd;
param = uniphier_get_ddrmphy_param();
if (!param) {
printf("unsupported SoC\n");
return CMD_RET_FAILURE;
}
if (argc == 1)
cmd = "all";
else
cmd = argv[1];
if (!strcmp(cmd, "zq") || !strcmp(cmd, "all"))
zq_dump();
zq_dump(param);
if (!strcmp(cmd, "wbdl") || !strcmp(cmd, "all"))
wbdl_dump();
wbdl_dump(param);
if (!strcmp(cmd, "rbdl") || !strcmp(cmd, "all"))
rbdl_dump();
rbdl_dump(param);
if (!strcmp(cmd, "wld") || !strcmp(cmd, "all"))
wld_dump();
wld_dump(param);
if (!strcmp(cmd, "dqsgd") || !strcmp(cmd, "all"))
dqsgd_dump();
dqsgd_dump(param);
if (!strcmp(cmd, "mdl") || !strcmp(cmd, "all"))
mdl_dump();
mdl_dump(param);
if (!strcmp(cmd, "reg") || !strcmp(cmd, "all"))
reg_dump();
reg_dump(param);
return 0;
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
ddrm, 2, 1, do_ddrm,
"UniPhier DDR PHY parameters dumper",
"UniPhier DDR Multi PHY parameters dumper",
"- dump all of the following\n"
"ddrm zq - dump Impedance Data\n"
"ddrm wbdl - dump Write Bit Delay\n"