Remove unused symbols
This commit removes the following unused symbols: CONFIG_SYS_NAND_DDR_LAW CONFIG_SYS_NAND_ECCSTEPS CONFIG_SYS_NAND_ECCTOTAL CONFIG_SYS_NAND_ENABLE_PIN_SPL CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES CONFIG_SYS_NAND_U_BOOT_RELOC_SP Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -235,8 +235,6 @@ extern unsigned long get_sdram_size(void);
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#endif
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#define CONFIG_SYS_NAND_DDR_LAW 11
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/* Set up IFC registers for boot location NOR/NAND */
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#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT)
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#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
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@ -234,7 +234,6 @@
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FTIM2_NAND_TWHRE(0x1e))
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#define CONFIG_SYS_NAND_DDR_LAW 11
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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#if defined(CONFIG_MTD_RAW_NAND)
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@ -210,7 +210,6 @@
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FTIM2_NAND_TWHRE(0x1e))
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#define CONFIG_SYS_NAND_DDR_LAW 11
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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#if defined(CONFIG_MTD_RAW_NAND)
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@ -198,7 +198,6 @@
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FTIM2_NAND_TWHRE(0x1e))
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#define CONFIG_SYS_NAND_DDR_LAW 11
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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#if defined(CONFIG_MTD_RAW_NAND)
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@ -174,7 +174,6 @@
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FTIM2_NAND_TWHRE(0x1e))
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#define CONFIG_SYS_NAND_DDR_LAW 11
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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#if defined(CONFIG_MTD_RAW_NAND)
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@ -231,7 +231,6 @@
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FTIM2_NAND_TWHRE(0x1e))
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#define CONFIG_SYS_NAND_FTIM3 0x0
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#define CONFIG_SYS_NAND_DDR_LAW 11
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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#if defined(CONFIG_MTD_RAW_NAND)
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@ -167,7 +167,6 @@
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#ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
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/* NAND stuff */
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
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#endif
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/* USB Configs */
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@ -117,10 +117,6 @@
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
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CONFIG_SYS_NAND_U_BOOT_SIZE - \
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CONFIG_SYS_MALLOC_LEN - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_NAND_ECCPOS { \
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24, 25, 26, 27, 28, \
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29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
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@ -116,10 +116,6 @@
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#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
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CONFIG_SYS_NAND_U_BOOT_SIZE - \
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CONFIG_SYS_MALLOC_LEN - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_NAND_ECCPOS { \
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6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
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22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
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@ -59,10 +59,6 @@
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_ECCSTEPS 4
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
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CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
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/*
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@ -92,7 +92,6 @@
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/* Defines for SPL */
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#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
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#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
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@ -126,7 +126,6 @@
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/* Defines for SPL */
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#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
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#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
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