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armv8: zynqmp: Map PCIe High as device memory

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Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.

Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Anders Hedlund
2017-12-19 17:24:41 +01:00
committed by Michal Simek
parent 01c42d3d74
commit 501fbc6744
1 changed files with 6 additions and 6 deletions
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12
arch/arm/cpu/armv8/zynqmp/cpu.c
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@@ -48,20 +48,20 @@ static struct mm_region zynqmp_mem_map[] = {
#endif #endif
.virt = 0x400000000UL, .virt = 0x400000000UL,
.phys = 0x400000000UL, .phys = 0x400000000UL,
.size = 0x200000000UL, .size = 0x400000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, { }, {
.virt = 0x600000000UL, .virt = 0x800000000UL,
.phys = 0x600000000UL, .phys = 0x800000000UL,
.size = 0x800000000UL, .size = 0x800000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE PTE_BLOCK_INNER_SHARE
}, { }, {
.virt = 0xe00000000UL, .virt = 0x1000000000UL,
.phys = 0xe00000000UL, .phys = 0x1000000000UL,
.size = 0xf200000000UL, .size = 0xf000000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN PTE_BLOCK_PXN | PTE_BLOCK_UXN