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armv8/ls2085a_emu: Enable sync of refresh

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Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers
stay in sync. DP-DDR has only one controller so it does no harm.

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun 2015-01-06 13:19:01 -08:00
parent 1478fdef52
commit 4f2532c4a4
1 changed files with 1 additions and 0 deletions
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include/configs/ls2085a_emu.h
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@ -20,4 +20,5 @@
#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
#define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */
#define CONFIG_FSL_DDR_SYNC_REFRESH
#endif /* __LS2_EMU_H */