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Merge branch '2022-01-15-TI-platform-updates'

Browse Source 
- Let am335x_evm use the CPSW or PRUSS ethernet.
- Implement timer_get_boot_us in the omap timer driver
- gpmc bitflip, QSPI clock calculation on am437x, da8xx_gpio bugfixes
- Assorted K3 updates
This commit is contained in:
Tom Rini 2022-01-17 11:24:43 -05:00
commit 4e81f3be34
19 changed files with 311 additions and 54 deletions
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73
arch/arm/dts/k3-am642-r5-sk.dts
View File

@ -7,6 +7,7 @@
#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am642.dtsi"
#include "k3-am64-sk-lp4-1333MTs.dtsi"
#include "k3-am64-ddr.dtsi"
@ -116,6 +117,47 @@
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
};
mdio1_pins_default: mdio1-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
>;
};
rgmii1_pins_default: rgmii1-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
>;
};
rgmii2_pins_default: rgmii2-pins-default {
pinctrl-single,pins = <
AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
>;
};
};
&dmsc {
@ -182,4 +224,35 @@
phy-names = "cdns3,usb3-phy";
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default
&rgmii1_pins_default
&rgmii2_pins_default>;
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw_port2 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy1>;
};
&cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
cpsw3g_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
#include "k3-am642-sk-u-boot.dtsi"

40
arch/arm/dts/k3-am642-sk-u-boot.dtsi
View File

@ -100,15 +100,53 @@
<0x0 0x43000200 0x0 0x8>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
u-boot,dm-spl;
cpsw-phy-sel@04044 {
compatible = "ti,am64-phy-gmii-sel";
reg = <0x0 0x43004044 0x0 0x8>;
u-boot,dm-spl;
};
ethernet-ports {
u-boot,dm-spl;
};
};
&cpsw_port2 {
status = "disabled";
u-boot,dm-spl;
};
&cpsw_port1 {
u-boot,dm-spl;
};
&main_bcdma {
u-boot,dm-spl;
};
&main_pktdma {
u-boot,dm-spl;
};
&rgmii1_pins_default {
u-boot,dm-spl;
};
&rgmii2_pins_default {
u-boot,dm-spl;
};
&mdio1_pins_default {
u-boot,dm-spl;
};
&cpsw3g_phy0 {
u-boot,dm-spl;
};
&cpsw3g_phy1 {
u-boot,dm-spl;
};
&main_usb0_pins_default {

10
arch/arm/mach-k3/am642_init.c
View File

@ -37,6 +37,9 @@ static void ctrl_mmr_unlock(void)
mmr_unlock(CTRL_MMR0_BASE, 3);
mmr_unlock(CTRL_MMR0_BASE, 5);
mmr_unlock(CTRL_MMR0_BASE, 6);
/* Unlock all MCU_PADCFG_MMR1 module registers */
mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
}
/*
@ -196,6 +199,13 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) &&
spl_boot_device() == BOOT_DEVICE_ETHERNET) {
struct udevice *cpswdev;
if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss), &cpswdev))
printf("Failed to probe am65_cpsw_nuss driver\n");
}
}
u32 spl_mmc_boot_mode(const u32 boot_device)

16
arch/arm/mach-k3/common.c
View File

@ -549,3 +549,19 @@ void spl_board_prepare_for_linux(void)
dcache_disable();
}
#endif
int misc_init_r(void)
{
if (IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(am65_cpsw_nuss),
&dev);
if (ret)
printf("Failed to probe am65_cpsw_nuss driver\n");
}
return 0;
}

2
arch/arm/mach-k3/include/mach/am64_hardware.h
View File

@ -12,6 +12,8 @@
#define PADCFG_MMR1_BASE 0xf0000
#define MCU_PADCFG_MMR1_BASE 0x04080000
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3

1
arch/arm/mach-k3/include/mach/am64_spl.h
View File

@ -12,6 +12,7 @@
#define BOOT_DEVICE_QSPI 0x02
#define BOOT_DEVICE_SPI 0x03
#define BOOT_DEVICE_ETHERNET 0x04
#define BOOT_DEVICE_CPGMAC 0x04
#define BOOT_DEVICE_ETHERNET_RGMII 0x04
#define BOOT_DEVICE_ETHERNET_RMII 0x05
#define BOOT_DEVICE_I2C 0x06

18
arch/arm/mach-k3/sysfw-loader.c
View File

@ -22,6 +22,7 @@
#include <dm/uclass-internal.h>
#include <spi_flash.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include "common.h"
@ -335,6 +336,14 @@ static void *k3_sysfw_get_spi_addr(void)
return (void *)(addr + CONFIG_K3_SYSFW_IMAGE_SPI_OFFS);
}
static void k3_sysfw_spi_copy(u32 *dst, u32 *src, size_t len)
{
size_t i;
for (i = 0; i < len / sizeof(*dst); i++)
*dst++ = *src++;
}
#endif
void k3_sysfw_loader(bool rom_loaded_sysfw,
@ -344,6 +353,9 @@ void k3_sysfw_loader(bool rom_loaded_sysfw,
struct spl_image_info spl_image = { 0 };
struct spl_boot_device bootdev = { 0 };
struct ti_sci_handle *ti_sci;
#if CONFIG_IS_ENABLED(SPI_LOAD)
void *sysfw_spi_base;
#endif
int ret = 0;
if (rom_loaded_sysfw) {
@ -394,9 +406,11 @@ void k3_sysfw_loader(bool rom_loaded_sysfw,
#endif
#if CONFIG_IS_ENABLED(SPI_LOAD)
case BOOT_DEVICE_SPI:
sysfw_load_address = k3_sysfw_get_spi_addr();
if (!sysfw_load_address)
sysfw_spi_base = k3_sysfw_get_spi_addr();
if (!sysfw_spi_base)
ret = -ENODEV;
k3_sysfw_spi_copy(sysfw_load_address, sysfw_spi_base,
CONFIG_K3_SYSFW_IMAGE_SIZE_MAX);
break;
#endif
#if CONFIG_IS_ENABLED(YMODEM_SUPPORT)

18
board/ti/am335x/board.c
View File

@ -11,6 +11,7 @@
#include <dm.h>
#include <env.h>
#include <errno.h>
#include <hang.h>
#include <image.h>
#include <init.h>
#include <malloc.h>
@ -38,6 +39,7 @@
#include <miiphy.h>
#include <cpsw.h>
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/delay.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
@ -691,6 +693,8 @@ done:
}
#endif
static bool __maybe_unused prueth_is_mii = true;
/*
* Basic board specific setup. Pinmux has been handled already.
*/
@ -710,6 +714,8 @@ int board_init(void)
if (board_is_icev2()) {
int rv;
u32 reg;
bool eth0_is_mii = true;
bool eth1_is_mii = true;
REQUEST_AND_SET_GPIO(GPIO_PR1_MII_CTRL);
/* Make J19 status available on GPIO1_26 */
@ -740,6 +746,7 @@ int board_init(void)
writel(reg, GPIO0_IRQSTATUS1); /* clear irq */
/* RMII mode */
printf("ETH0, CPSW\n");
eth0_is_mii = false;
} else {
/* MII mode */
printf("ETH0, PRU\n");
@ -752,12 +759,21 @@ int board_init(void)
/* RMII mode */
printf("ETH1, CPSW\n");
gpio_set_value(GPIO_MUX_MII_CTRL, 1);
eth1_is_mii = false;
} else {
/* MII mode */
printf("ETH1, PRU\n");
cdce913_data.pdiv2 = 4; /* 25MHz PHY clk */
}
if (eth0_is_mii != eth1_is_mii) {
printf("Unsupported Ethernet port configuration\n");
printf("Both ports must be set as RMII or MII\n");
hang();
}
prueth_is_mii = eth0_is_mii;
/* disable rising edge IRQs */
reg = readl(GPIO0_RISINGDETECT) & ~BIT(11);
writel(reg, GPIO0_RISINGDETECT);
@ -852,6 +868,8 @@ int board_late_init(void)
if (is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("eth1addr", mac_addr);
}
env_set("ice_mii", prueth_is_mii ? "mii" : "rmii");
#endif
if (!env_get("serial#")) {

3
board/ti/am64x/evm.c
View File

@ -196,5 +196,8 @@ void spl_board_init(void)
val = readl(CTRLMMR_USB0_PHY_CTRL);
val &= ~(CORE_VOLTAGE);
writel(val, CTRLMMR_USB0_PHY_CTRL);
/* Init DRAM size for R5/A53 SPL */
dram_init_banksize();
}
#endif

1
configs/am43xx_hs_evm_defconfig
View File

@ -33,6 +33,7 @@ CONFIG_SPL_NAND_BASE=y
CONFIG_SPL_NET=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_USB_HOST=y
CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2

21
drivers/dma/ti/k3-udma.c
View File

@ -165,7 +165,6 @@ struct udma_dev {
unsigned long *rchan_map;
unsigned long *rflow_map;
unsigned long *rflow_map_reserved;
unsigned long *rflow_in_use;
unsigned long *tflow_map;
struct udma_bchan *bchans;
@ -1448,15 +1447,11 @@ static int bcdma_setup_resources(struct udma_dev *ud)
sizeof(unsigned long), GFP_KERNEL);
ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans),
GFP_KERNEL);
/* BCDMA do not really have flows, but the driver expect it */
ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rchan_cnt),
sizeof(unsigned long),
GFP_KERNEL);
ud->rflows = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rflows),
GFP_KERNEL);
if (!ud->bchan_map || !ud->tchan_map || !ud->rchan_map ||
!ud->rflow_in_use || !ud->bchans || !ud->tchans || !ud->rchans ||
!ud->bchans || !ud->tchans || !ud->rchans ||
!ud->rflows)
return -ENOMEM;
@ -1535,16 +1530,16 @@ static int pktdma_setup_resources(struct udma_dev *ud)
sizeof(unsigned long), GFP_KERNEL);
ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans),
GFP_KERNEL);
ud->rflow_in_use = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt),
sizeof(unsigned long),
GFP_KERNEL);
ud->rflow_map = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt),
sizeof(unsigned long),
GFP_KERNEL);
ud->rflows = devm_kcalloc(dev, ud->rflow_cnt, sizeof(*ud->rflows),
GFP_KERNEL);
ud->tflow_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tflow_cnt),
sizeof(unsigned long), GFP_KERNEL);
if (!ud->tchan_map || !ud->rchan_map || !ud->tflow_map || !ud->tchans ||
!ud->rchans || !ud->rflows || !ud->rflow_in_use)
!ud->rchans || !ud->rflows || !ud->rflow_map)
return -ENOMEM;
/* Get resource ranges from tisci */
@ -1592,12 +1587,12 @@ static int pktdma_setup_resources(struct udma_dev *ud)
rm_res = tisci_rm->rm_ranges[RM_RANGE_RFLOW];
if (IS_ERR(rm_res)) {
/* all rflows are assigned exclusively to Linux */
bitmap_zero(ud->rflow_in_use, ud->rflow_cnt);
bitmap_zero(ud->rflow_map, ud->rflow_cnt);
} else {
bitmap_fill(ud->rflow_in_use, ud->rflow_cnt);
bitmap_fill(ud->rflow_map, ud->rflow_cnt);
for (i = 0; i < rm_res->sets; i++) {
rm_desc = &rm_res->desc[i];
bitmap_clear(ud->rflow_in_use, rm_desc->start,
bitmap_clear(ud->rflow_map, rm_desc->start,
rm_desc->num);
dev_dbg(dev, "ti-sci-res: rflow: %d:%d\n",
rm_desc->start, rm_desc->num);

8
drivers/gpio/da8xx_gpio.c
View File

@ -545,12 +545,20 @@ static int davinci_gpio_of_to_plat(struct udevice *dev)
{
struct davinci_gpio_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
char name[18], *str;
addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
plat->base = addr;
sprintf(name, "gpio@%4x_", (unsigned int)plat->base);
str = strdup(name);
if (!str)
return -ENOMEM;
plat->port_name = str;
return 0;
}

45
drivers/mtd/nand/raw/omap_gpmc.c
View File

@ -507,19 +507,45 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
/* check calculated ecc */
for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
if (calc_ecc[i] != 0x00)
ecc_flag = 1;
goto not_ecc_match;
}
if (!ecc_flag)
return 0;
return 0;
not_ecc_match:
/* check for whether its a erased-page */
ecc_flag = 0;
for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
/* check for whether it's an erased-page */
for (i = 0; i < ecc->bytes; i++) {
if (read_ecc[i] != 0xff)
ecc_flag = 1;
goto not_erased;
}
for (i = 0; i < SECTOR_BYTES; i++) {
if (dat[i] != 0xff)
goto not_erased;
}
return 0;
not_erased:
/*
* Check for whether it's an erased page with a correctable
* number of bitflips. Erased pages have all 1's in the data,
* so we just compute the number of 0 bits in the data and
* see if it's under the correction threshold.
*
* NOTE: The check for a perfect erased page above is faster for
* the more common case, even though it's logically redundant.
*/
for (i = 0; i < ecc->bytes; i++)
error_count += hweight8(~read_ecc[i]);
for (i = 0; i < SECTOR_BYTES; i++)
error_count += hweight8(~dat[i]);
if (error_count <= ecc->strength) {
memset(read_ecc, 0xFF, ecc->bytes);
memset(dat, 0xFF, SECTOR_BYTES);
debug("nand: %u bit-flip(s) corrected in erased page\n",
error_count);
return error_count;
}
if (!ecc_flag)
return 0;
/*
* while reading ECC result we read it in big endian.
@ -539,6 +565,7 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
}
/* use elm module to check for errors */
elm_config(bch_type);
error_count = 0;
err = elm_check_error(calc_ecc, bch_type, &error_count, error_loc);
if (err)
return err;

2
drivers/net/ti/Kconfig
View File

@ -28,6 +28,8 @@ config DRIVER_TI_KEYSTONE_NET
config TI_AM65_CPSW_NUSS
bool "TI K3 AM65x MCU CPSW Nuss Ethernet controller driver"
depends on ARCH_K3
imply MISC_INIT_R
imply MISC
select PHYLIB
help
This driver supports TI K3 MCU CPSW Nuss Ethernet controller

77
drivers/net/ti/am65-cpsw-nuss.c
View File

@ -597,7 +597,7 @@ static int am65_cpsw_phy_init(struct udevice *dev)
return ret;
}
static int am65_cpsw_ofdata_parse_phy(struct udevice *dev, ofnode port_np)
static int am65_cpsw_ofdata_parse_phy(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_priv *priv = dev_get_priv(dev);
@ -605,7 +605,9 @@ static int am65_cpsw_ofdata_parse_phy(struct udevice *dev, ofnode port_np)
const char *phy_mode;
int ret = 0;
phy_mode = ofnode_read_string(port_np, "phy-mode");
dev_read_u32(dev, "reg", &priv->port_id);
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode) {
pdata->phy_interface =
phy_get_interface_by_name(phy_mode);
@ -617,13 +619,13 @@ static int am65_cpsw_ofdata_parse_phy(struct udevice *dev, ofnode port_np)
}
}
ofnode_read_u32(port_np, "max-speed", (u32 *)&pdata->max_speed);
dev_read_u32(dev, "max-speed", (u32 *)&pdata->max_speed);
if (pdata->max_speed)
dev_err(dev, "Port %u speed froced to %uMbit\n",
priv->port_id, pdata->max_speed);
priv->has_phy = true;
ret = ofnode_parse_phandle_with_args(port_np, "phy-handle",
ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "phy-handle",
NULL, 0, 0, &out_args);
if (ret) {
dev_err(dev, "can't parse phy-handle port %u (%d)\n",
@ -646,21 +648,46 @@ out:
return ret;
}
static int am65_cpsw_probe_cpsw(struct udevice *dev)
static int am65_cpsw_port_probe(struct udevice *dev)
{
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_common *cpsw_common;
ofnode ports_np, node;
int ret, i;
char portname[15];
int ret;
priv->dev = dev;
cpsw_common = calloc(1, sizeof(*priv->cpsw_common));
if (!cpsw_common)
return -ENOMEM;
cpsw_common = dev_get_priv(dev->parent);
priv->cpsw_common = cpsw_common;
sprintf(portname, "%s%s", dev->parent->name, dev->name);
device_set_name(dev, portname);
ret = am65_cpsw_ofdata_parse_phy(dev);
if (ret)
goto out;
am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id);
ret = am65_cpsw_mdio_init(dev);
if (ret)
goto out;
ret = am65_cpsw_phy_init(dev);
if (ret)
goto out;
out:
return ret;
}
static int am65_cpsw_probe_nuss(struct udevice *dev)
{
struct am65_cpsw_common *cpsw_common = dev_get_priv(dev);
ofnode ports_np, node;
int ret, i;
struct udevice *port_dev;
cpsw_common->dev = dev;
cpsw_common->ss_base = dev_read_addr(dev);
if (cpsw_common->ss_base == FDT_ADDR_T_NONE)
@ -723,10 +750,9 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
if (disabled)
continue;
priv->port_id = port_id;
ret = am65_cpsw_ofdata_parse_phy(dev, node);
ret = device_bind_driver_to_node(dev, "am65_cpsw_nuss_port", ofnode_get_name(node), node, &port_dev);
if (ret)
goto out;
printf("SCREEEM\n");
}
for (i = 0; i < AM65_CPSW_CPSWNU_MAX_PORTS; i++) {
@ -756,16 +782,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
dev_read_u32_default(dev, "bus_freq",
AM65_CPSW_MDIO_BUS_FREQ_DEF);
am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id);
ret = am65_cpsw_mdio_init(dev);
if (ret)
goto out;
ret = am65_cpsw_phy_init(dev);
if (ret)
goto out;
dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n",
readl(cpsw_common->ss_base),
readl(cpsw_common->cpsw_base),
@ -786,11 +802,18 @@ static const struct udevice_id am65_cpsw_nuss_ids[] = {
{ }
};
U_BOOT_DRIVER(am65_cpsw_nuss_slave) = {
.name = "am65_cpsw_nuss_slave",
.id = UCLASS_ETH,
U_BOOT_DRIVER(am65_cpsw_nuss) = {
.name = "am65_cpsw_nuss",
.id = UCLASS_MISC,
.of_match = am65_cpsw_nuss_ids,
.probe = am65_cpsw_probe_cpsw,
.probe = am65_cpsw_probe_nuss,
.priv_auto = sizeof(struct am65_cpsw_common),
};
U_BOOT_DRIVER(am65_cpsw_nuss_port) = {
.name = "am65_cpsw_nuss_port",
.id = UCLASS_ETH,
.probe = am65_cpsw_port_probe,
.ops = &am65_cpsw_ops,
.priv_auto = sizeof(struct am65_cpsw_priv),
.plat_auto = sizeof(struct eth_pdata),

3
drivers/spi/ti_qspi.c
View File

@ -30,7 +30,8 @@ DECLARE_GLOBAL_DATA_PTR;
/* ti qpsi register bit masks */
#define QSPI_TIMEOUT 2000000
#define QSPI_FCLK 192000000
/* AM4372: QSPI gets SPI_GCLK from PRCM unit as PER_CLKOUTM2 divided by 4. */
#define QSPI_FCLK (192000000 / 4)
#define QSPI_DRA7XX_FCLK 76800000
#define QSPI_WLEN_MAX_BITS 128
#define QSPI_WLEN_MAX_BYTES (QSPI_WLEN_MAX_BITS >> 3)

21
drivers/timer/omap-timer.c
View File

@ -83,6 +83,27 @@ static int omap_timer_of_to_plat(struct udevice *dev)
return 0;
}
#if CONFIG_IS_ENABLED(BOOTSTAGE)
ulong timer_get_boot_us(void)
{
u64 ticks = 0;
u32 rate = 1;
u64 us;
int ret;
ret = dm_timer_init();
if (!ret) {
/* The timer is available */
rate = timer_get_rate(gd->timer);
timer_get_count(gd->timer, &ticks);
} else {
return 0;
}
us = (ticks * 1000) / rate;
return us;
}
#endif
static const struct timer_ops omap_timer_ops = {
.get_count = omap_timer_get_count,

5
include/configs/am335x_evm.h
View File

@ -143,7 +143,10 @@
"if test $board_name = A335X_SK; then " \
"setenv fdtfile am335x-evmsk.dtb; fi; " \
"if test $board_name = A335_ICE; then " \
"setenv fdtfile am335x-icev2.dtb; fi; " \
"setenv fdtfile am335x-icev2.dtb; " \
"if test $ice_mii = mii; then " \
"setenv pxe_label_override Pruss; fi;" \
"fi; " \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"init_console=" \

1
include/configs/ti_armv7_common.h
View File

@ -37,6 +37,7 @@
"fdtaddr=0x88000000\0" \
"dtboaddr=0x89000000\0" \
"fdt_addr_r=0x88000000\0" \
"fdtoverlay_addr_r=0x89000000\0" \
"rdaddr=0x88080000\0" \
"ramdisk_addr_r=0x88080000\0" \
"scriptaddr=0x80000000\0" \