x86: crownbay: Enable on-board SMSC superio keyboard controller
So far we only enabled one legacy serial port on the SMSC LPC47m superio chipset on Intel Crown Bay board. As the board also has dual PS/2 ports routed out, enable the keyboard controller which is i8042 compatible so that we can use PS/2 keyboard and mouse. In order to make PS/2 keyboard work with the VGA console, remove CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode using PIRQ routing table, adjust the mask in the device tree to reserve irq12 which is used by PS/2 mouse. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
8ceb2429c9
commit
4dd02a752c
@ -168,7 +168,7 @@
|
||||
compatible = "intel,irq-router";
|
||||
intel,pirq-config = "pci";
|
||||
intel,pirq-link = <0x60 8>;
|
||||
intel,pirq-mask = <0xdee0>;
|
||||
intel,pirq-mask = <0xcee0>;
|
||||
intel,pirq-routing = <
|
||||
/* TunnelCreek PCI devices */
|
||||
PCI_BDF(0, 2, 0) INTA PIRQE
|
||||
|
@ -10,11 +10,12 @@
|
||||
#include <netdev.h>
|
||||
#include <smsc_lpc47m.h>
|
||||
|
||||
#define SERIAL_DEV PNP_DEV(0x2e, 4)
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
|
||||
lpc47m_enable_serial(PNP_DEV(LPC47M_IO_PORT, LPC47M_SP1),
|
||||
UART0_BASE, UART0_IRQ);
|
||||
lpc47m_enable_kbc(PNP_DEV(LPC47M_IO_PORT, LPC47M_KBC),
|
||||
KBD_IRQ, MSE_IRQ);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -53,9 +53,6 @@
|
||||
#define CONFIG_PCH_GBE
|
||||
#define CONFIG_PHYLIB
|
||||
|
||||
/* TunnelCreek IGD support */
|
||||
#define CONFIG_VGA_AS_SINGLE_DEVICE
|
||||
|
||||
/* Environment configuration */
|
||||
#define CONFIG_ENV_SECT_SIZE 0x1000
|
||||
#define CONFIG_ENV_OFFSET 0
|
||||
|
Loading…
Reference in New Issue
Block a user