leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

Browse Source
This commit is contained in:
Tom Rini
2015-06-08 08:37:02 -04:00
parent 5bcec545a6 943a3f2ccb
commit 4d80051b63
38 changed files with 794 additions and 114 deletions
Download Patch File Download Diff File Expand all files Collapse all files

55
board/bachmann/ot1200/ot1200.c
View File

@@ -120,6 +120,42 @@ static void setup_iomux_features(void)
ARRAY_SIZE(feature_pads));
}
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C2 - EEPROM */
static struct i2c_pads_info i2c_pad_info1 = {
.scl = {
.i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
.gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
.gp = IMX_GPIO_NR(2, 30)
},
.sda = {
.i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
.gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
.gp = IMX_GPIO_NR(3, 16)
}
};
/* I2C3 - IO expander */
static struct i2c_pads_info i2c_pad_info2 = {
.scl = {
.i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
.gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
.gp = IMX_GPIO_NR(3, 17)
},
.sda = {
.i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
.gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
.gp = IMX_GPIO_NR(3, 18)
}
};
static void setup_iomux_i2c(void)
{
setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
}
static void ccgr_init(void)
{
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -151,6 +187,7 @@ int board_early_init_f(void)
setup_iomux_uart();
setup_iomux_spi();
setup_iomux_i2c();
setup_iomux_features();
return 0;
@@ -236,22 +273,6 @@ int board_mmc_init(bd_t *bis)
return 0;
}
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/* I2C3 - IO expander */
static struct i2c_pads_info i2c_pad_info2 = {
.scl = {
.i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
.gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
.gp = IMX_GPIO_NR(3, 17)
},
.sda = {
.i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
.gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
.gp = IMX_GPIO_NR(3, 18)
}
};
static iomux_v3_cfg_t const pwm_pad[] = {
MX6_PAD_SD1_CMD__PWM4_OUT | MUX_PAD_CTRL(OUTPUT_40OHM),
};
@@ -315,8 +336,6 @@ int board_init(void)
backlight_lcd_off();
setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
leds_on();
#ifdef CONFIG_CMD_SATA

92
board/gateworks/gw_ventana/common.c
View File

@@ -191,7 +191,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* MX6_LOCLED# */
IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* GPS_SHDN */
@@ -204,11 +205,17 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* PCI_RST# (GW522x) */
IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* PANLEDG# */
IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
/* PANLEDR# */
@@ -227,36 +234,46 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* PCI_RST# */
IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
/* PANLEDG# */
IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
/* PANLEDR# */
IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* MX6_LOCLED# */
IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG),
/* MIPI_DIO */
IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_EIM_D24__GPIO3_IO24 | DIO_PAD_CFG),
/* IOEXP_PWREN# */
IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
/* IOEXP_IRQ# */
IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
/* DIOI2C_DIS# */
IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
/* PCI_RST# */
IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
/* VID_EN */
IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
/* RS485_EN */
IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
/* PCIESKT_WDIS# */
IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
};
static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
/* CAN_STBY */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* PANLED# */
IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
/* PCI_RST# */
@@ -266,6 +283,10 @@ static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
};
static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
/* USBOTG_SEL */
IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
/* USB_HUBRST# */
IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
/* PANLEDG# */
IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
/* PANLEDR# */
@@ -520,6 +541,32 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
{
.gpio_pads = gw551x_gpio_pads,
.num_pads = ARRAY_SIZE(gw551x_gpio_pads)/2,
.dio_cfg = {
{
{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
IMX_GPIO_NR(1, 19),
{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
2
},
{
{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
IMX_GPIO_NR(1, 17),
{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
3
},
},
.num_gpios = 2,
.leds = {
IMX_GPIO_NR(4, 7),
},
.pcie_rst = IMX_GPIO_NR(1, 0),
.wdis = IMX_GPIO_NR(7, 12),
},
/* GW552x */
{
.gpio_pads = gw552x_gpio_pads,
.num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2,
.dio_cfg = {
{
{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
@@ -540,36 +587,10 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
3
},
{
{ IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
IMX_GPIO_NR(1, 18),
{ IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
4
},
},
.num_gpios = 2,
.leds = {
IMX_GPIO_NR(4, 7),
},
.pcie_rst = IMX_GPIO_NR(1, 0),
.wdis = IMX_GPIO_NR(7, 12),
},
/* GW552x */
{
.gpio_pads = gw552x_gpio_pads,
.num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2,
.dio_cfg = {
{
{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
IMX_GPIO_NR(1, 19),
{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
2
},
{
{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
IMX_GPIO_NR(1, 17),
{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
3
{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
IMX_GPIO_NR(1, 20),
{ 0, 0 },
0
},
},
.num_gpios = 4,
@@ -579,6 +600,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
IMX_GPIO_NR(4, 15),
},
.pcie_rst = IMX_GPIO_NR(1, 29),
.usb_sel = IMX_GPIO_NR(1, 7),
.wdis = IMX_GPIO_NR(7, 12),
},
};
@@ -712,7 +734,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
* Configure DIO pinmux/padctl registers
* see IMX6DQRM/IMX6SDLRM IOMUXC_SW_PAD_CTL_PAD_* register definitions
*/
for (i = 0; i < 4; i++) {
for (i = 0; i < gpio_cfg[board].num_gpios; i++) {
struct dio_cfg *cfg = &gpio_cfg[board].dio_cfg[i];
iomux_v3_cfg_t ctrl = DIO_PAD_CFG;
unsigned cputype = is_cpu_type(MXC_CPU_MX6Q) ? 0 : 1;

6
board/gateworks/gw_ventana/common.h
View File

@@ -34,10 +34,6 @@
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define DIO_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
@@ -46,7 +42,7 @@
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
#define DIO_PAD_CFG (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION)
#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION)
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)

41
board/gateworks/gw_ventana/gw_ventana.c
View File

@@ -157,20 +157,18 @@ static iomux_v3_cfg_t const usb_pads[] = {
int board_ehci_hcd_init(int port)
{
struct ventana_board_info *info = &ventana_info;
int gpio;
SETUP_IOMUX_PADS(usb_pads);
/* Reset USB HUB (present on GW54xx/GW53xx) */
switch (info->model[3]) {
case '3': /* GW53xx */
case '5': /* GW552x */
SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG);
/* Reset USB HUB */
switch (board_type) {
case GW53xx:
case GW552x:
gpio = (IMX_GPIO_NR(1, 9));
break;
case '4': /* GW54xx */
SETUP_IOMUX_PAD(PAD_SD1_DAT0__GPIO1_IO16 | DIO_PAD_CFG);
case GW54proto:
case GW54xx:
gpio = (IMX_GPIO_NR(1, 16));
break;
default:
@@ -687,8 +685,7 @@ int misc_init_r(void)
memset(str, 0, sizeof(str));
for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++)
str[i] = tolower(info->model[i]);
if (!getenv("model"))
setenv("model", str);
setenv("model", str);
if (!getenv("fdt_file")) {
sprintf(fdt, "%s-%s.dtb", cputype, str);
setenv("fdt_file", fdt);
@@ -698,18 +695,14 @@ int misc_init_r(void)
*p++ = 0;
setenv("model_base", str);
if (!getenv("fdt_file1")) {
sprintf(fdt, "%s-%s.dtb", cputype, str);
setenv("fdt_file1", fdt);
}
sprintf(fdt, "%s-%s.dtb", cputype, str);
setenv("fdt_file1", fdt);
if (board_type != GW551x && board_type != GW552x)
str[4] = 'x';
str[5] = 'x';
str[6] = 0;
if (!getenv("fdt_file2")) {
sprintf(fdt, "%s-%s.dtb", cputype, str);
setenv("fdt_file2", fdt);
}
sprintf(fdt, "%s-%s.dtb", cputype, str);
setenv("fdt_file2", fdt);
}
/* initialize env from EEPROM */
@@ -818,9 +811,11 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
/* Update partition nodes using info from mtdparts env var */
puts(" Updating MTD partitions...\n");
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
if (test_bit(EECONFIG_NAND, info->config)) {
/* Update partition nodes using info from mtdparts env var */
puts(" Updating MTD partitions...\n");
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
}
/* Update display timings from display env var */
if (display) {
@@ -829,10 +824,6 @@ int ft_board_setup(void *blob, bd_t *bd)
printf(" Set display timings for %s...\n", display);
}
if (!model) {
puts("invalid board info: Leaving FDT fully enabled\n");
return 0;
}
printf(" Adjusting FDT per EEPROM for %s...\n", model);
/* board serial number */

6
board/gateworks/gw_ventana/gw_ventana_spl.c
View File

@@ -515,10 +515,8 @@ void board_init_f(ulong dummy)
setup_iomux_gpio(board_model, &ventana_info);
/* provide some some default: 32bit 128MB */
if (GW_UNKNOWN == board_model) {
ventana_info.sdram_width = 2;
ventana_info.sdram_size = 3;
}
if (GW_UNKNOWN == board_model)
hang();
/* configure MMDC for SDRAM width/size and per-model calibration */
spl_dram_init(8 << ventana_info.sdram_width,

4
board/toradex/colibri_vf/MAINTAINERS
View File

@@ -4,3 +4,7 @@ S: Maintained
F: board/toradex/colibri_vf/
F: include/configs/colibri_vf.h
F: configs/colibri_vf_defconfig
F: configs/colibri_vf_dtb_defconfig
F: arch/arm/dts/vf-colibri.dtsi
F: arch/arm/dts/vf500-colibri.dts
F: arch/arm/dts/vf610-colibri.dts

106
board/toradex/colibri_vf/colibri_vf.c
View File

@@ -20,6 +20,7 @@
#include <netdev.h>
#include <i2c.h>
#include <g_dnl.h>
#include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -32,6 +33,12 @@ DECLARE_GLOBAL_DATA_PTR;
#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
#define USB_PEN_GPIO 83
static const iomux_v3_cfg_t usb_pads[] = {
VF610_PAD_PTD4__GPIO_83,
};
int dram_init(void)
{
static const struct ddr3_jedec_timings timings = {
@@ -146,6 +153,76 @@ static void setup_iomux_nfc(void)
}
#endif
#ifdef CONFIG_FSL_DSPI
static void setup_iomux_dspi(void)
{
static const iomux_v3_cfg_t dspi1_pads[] = {
VF610_PAD_PTD5__DSPI1_CS0,
VF610_PAD_PTD6__DSPI1_SIN,
VF610_PAD_PTD7__DSPI1_SOUT,
VF610_PAD_PTD8__DSPI1_SCK,
};
imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads));
}
#endif
#ifdef CONFIG_VYBRID_GPIO
static void setup_iomux_gpio(void)
{
static const iomux_v3_cfg_t gpio_pads[] = {
VF610_PAD_PTA17__GPIO_7,
VF610_PAD_PTA20__GPIO_10,
VF610_PAD_PTA21__GPIO_11,
VF610_PAD_PTA30__GPIO_20,
VF610_PAD_PTA31__GPIO_21,
VF610_PAD_PTB0__GPIO_22,
VF610_PAD_PTB1__GPIO_23,
VF610_PAD_PTB6__GPIO_28,
VF610_PAD_PTB7__GPIO_29,
VF610_PAD_PTB8__GPIO_30,
VF610_PAD_PTB9__GPIO_31,
VF610_PAD_PTB12__GPIO_34,
VF610_PAD_PTB13__GPIO_35,
VF610_PAD_PTB16__GPIO_38,
VF610_PAD_PTB17__GPIO_39,
VF610_PAD_PTB18__GPIO_40,
VF610_PAD_PTB21__GPIO_43,
VF610_PAD_PTB22__GPIO_44,
VF610_PAD_PTC0__GPIO_45,
VF610_PAD_PTC1__GPIO_46,
VF610_PAD_PTC2__GPIO_47,
VF610_PAD_PTC3__GPIO_48,
VF610_PAD_PTC4__GPIO_49,
VF610_PAD_PTC5__GPIO_50,
VF610_PAD_PTC6__GPIO_51,
VF610_PAD_PTC7__GPIO_52,
VF610_PAD_PTC8__GPIO_53,
VF610_PAD_PTD31__GPIO_63,
VF610_PAD_PTD30__GPIO_64,
VF610_PAD_PTD29__GPIO_65,
VF610_PAD_PTD28__GPIO_66,
VF610_PAD_PTD27__GPIO_67,
VF610_PAD_PTD26__GPIO_68,
VF610_PAD_PTD25__GPIO_69,
VF610_PAD_PTD24__GPIO_70,
VF610_PAD_PTD9__GPIO_88,
VF610_PAD_PTD10__GPIO_89,
VF610_PAD_PTD11__GPIO_90,
VF610_PAD_PTD12__GPIO_91,
VF610_PAD_PTD13__GPIO_92,
VF610_PAD_PTB23__GPIO_93,
VF610_PAD_PTB26__GPIO_96,
VF610_PAD_PTB28__GPIO_98,
VF610_PAD_PTC29__GPIO_102,
VF610_PAD_PTC30__GPIO_103,
VF610_PAD_PTA7__GPIO_134,
};
imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads));
}
#endif
#ifdef CONFIG_FSL_ESDHC
struct fsl_esdhc_cfg esdhc_cfg[1] = {
{ESDHC1_BASE_ADDR},
@@ -196,6 +273,9 @@ static void clock_init(void)
clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK,
CCM_CCGR0_UART0_CTRL_MASK);
#ifdef CONFIG_FSL_DSPI
setbits_le32(&ccm->ccgr0, CCM_CCGR0_DSPI1_CTRL_MASK);
#endif
clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK,
CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK);
clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK,
@@ -304,6 +384,14 @@ int board_early_init_f(void)
setup_iomux_nfc();
#endif
#ifdef CONFIG_VYBRID_GPIO
setup_iomux_gpio();
#endif
#ifdef CONFIG_FSL_DSPI
setup_iomux_dspi();
#endif
return 0;
}
@@ -383,3 +471,21 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
return 0;
}
#ifdef CONFIG_USB_EHCI_VF
int board_ehci_hcd_init(int port)
{
imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
switch (port) {
case 0:
/* USBC does not have PEN, also configured as USB client only */
break;
case 1:
gpio_request(USB_PEN_GPIO, "usb-pen-gpio");
gpio_direction_output(USB_PEN_GPIO, 0);
break;
}
return 0;
}
#endif

26
board/wandboard/wandboard.c
View File

@@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2)
#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9)
#define ETH_PHY_RESET IMX_GPIO_NR(3, 29)
#define REV_DETECTION IMX_GPIO_NR(2, 28)
int dram_init(void)
{
@@ -105,6 +106,10 @@ static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),
};
static iomux_v3_cfg_t const rev_detection_pad[] = {
IOMUX_PADS(PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)),
};
static void setup_iomux_uart(void)
{
SETUP_IOMUX_PADS(uart1_pads);
@@ -393,6 +398,17 @@ static const struct boot_mode board_boot_modes[] = {
};
#endif
static bool is_revc1(void)
{
SETUP_IOMUX_PADS(rev_detection_pad);
gpio_direction_input(REV_DETECTION);
if (gpio_get_value(REV_DETECTION))
return true;
else
return false;
}
int board_late_init(void)
{
#ifdef CONFIG_CMD_BMODE
@@ -404,6 +420,11 @@ int board_late_init(void)
setenv("board_rev", "MX6Q");
else
setenv("board_rev", "MX6DL");
if (is_revc1())
setenv("board_name", "C1");
else
setenv("board_name", "B1");
#endif
return 0;
}
@@ -424,7 +445,10 @@ int board_init(void)
int checkboard(void)
{
puts("Board: Wandboard\n");
if (is_revc1())
puts("Board: Wandboard rev C1\n");
else
puts("Board: Wandboard rev B1\n");
return 0;
}

2
board/warp/README
View File

@@ -34,7 +34,7 @@ Then U-boot should start and its messages will appear in the console program.
Use the default environment variables:
=> env default -f -a
=> save
=> saveenv
Run the DFU command:
=> dfu 0 mmc 0